bdi
GDB
for BDI3000 (QorIQ P3/P4/P5)
User Manual
24
© Copyright 1997-2012 by ABATRON AG Switzerland
V 1.03
3.2.2 Part [TARGET]
The part [TARGET] defines some target specific values.
CPUTYPE type core [soc]This value gives the BDI information about the connected CPU/core.
type
P2040, P3041, P4040, P4080,
P5010, P5020, P5021, P5040
core
the core number within the SOC (0...n)
soc
the SOC number (0...3)
Example:
CPUTYPE P4080 0 0 ; Core0 / SOC0
CPUTYPE P4080 1 ; Core1 / SOC0
CPUTYPE P4080 3 1 ; Core3 / SOC1
JTAGCLOCK value
With this value you can select the JTAG clock rate the BDI3000 uses when
communication with the target CPU.
value
0 = 32 MHz
5 = 4 MHz
10 = 50 kHz
1 = 16 MHz
6 = 1 MHz
11 = 20 kHz
2 = 11 MHz
7 = 500 kHz
12 = 10 kHz
3 = 8 MHz
8 = 200 kHz
13 = 5 kHz
4 = 5 MHz
9 = 100 kHz
Example:
CLOCK 1 ; JTAG clock is 16 MHz
POWERUP delay
When the BDI detects target power-up, HRESET is forced immediately.
This way no code from a boot ROM is executed after power-up. The value
entered in this configuration line is the delay time in milliseconds the BDI
waits before it begins JTAG communication. This time should be longer
than the on-board reset circuit asserts HRESET.
delay
the power-up start delay in milliseconds
Example:
POWERUP 5000 ;start delay after power-up
RESET type [time]
Normally the BDI drives the HRESET line during startup. If reset type is
NONE, the BDI does not assert a hardware reset during startup. This entry
can also be used to change the default reset time.
type
NONE
HARD (default)
KEEP keep HRESET assert during target power-up
time
The time in milliseconds the BDI assert the reset signal.
Example:
RESET NONE ; no reset during startup
RESET HARD 1000 ; assert RESET for 1 second
EDBCR0 list
This parameter allows to change the default EDBCR0 value. By default
the EDM, DNH and EFT bits are set.
list
defines the bits to set (EDM, DNH and EFT)
Example:
EDBCR0 EDM DNH EFT ;this is the default
EDBCR0 EDM DNH ;do not freeze timers
EDBCR0 DNH ;do not halt on debug events
