14 PEX430
Publication No. PEX430-0HH/1QD
3.1.2
PCI Express Port Lane Configuration (E3)
The PEX430 has a number of different PCI Express lane options, the configuration of
which is set up as shown in Table 3-3.
Table 3-3
E3 Pins 5-6 E3 Pins 3-4
PCI Express Lane Configuration
Notes
Port 0 Port 1 Port 2 Port 3
Open
Open
X4
X4
X4
X4
Default Configuration
Open
Closed
X8
X8
X0
X0
Closed
Open
X8
X4
X4
X0
Closed
Closed
X8
X4
X2
X2
3.1.3
PCI Express Upstream Port Configuration (E1)
Using E1 to change the configuration of the upstream port enables the user to set the
PEX430 into a basic mode that suits their application, and enables them to program
the settings they require into the on-board EEPROM.
NOTE
It is not expected that jumpers will be used to permanently change the upstream port.
A user will normally configure the PEX430 to use another upstream port using the jumpers, and then this
configuration will be programmed into the EEPROM.
Subsequently, the jumpers can be removed and the board will be set to boot using the values stored in the
EEPROM. There is an option to ignore the EEPROM should the contents become corrupt or unsuitable for a
particular application.
Programming the EEPROM requires an application to be run on the SBC that is connected to the PEX430.
Table 3-4
Backplane NVMRO PEX430 E1 Pins 3-4 PEX430 E1 Pins 5-6 PEX430 E1 Pins 1-2 Description
1
Don’t Care
Don’t Care
Don’t Care
Upstream port is the default Port 0
0
Open
Don’t Care
Don’t Care
Upstream port is set to Port 0
0
Closed
Open
Open
Upstream port is set to Port 0
0
Closed
Open
Closed
Upstream port is set to Port 1
0
Closed
Closed
Open
Upstream port is set to Port 2
0
Closed
Closed
Closed
Upstream port is set to Port 3
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