Page 58 MS-SOUND decoders MS440 to MS990
CV
Denomination
Range
Default Description
3.4
#15
#16
Decoder Lock
0 - 255
0 - 255
0
0
The decoder lock is used to access the CVs of several
decoders with identical address separately.
The CVs #16 of each decoder are programmed to differ-
ent values before installation. If necessary, the CV #15 of
this decoder is reprogrammed to the value of "its" CV #16
> all CVs addressable.
3.4
#17
#18
Extended (long) ad-
dress
128
-
10239
0
The long (“extended”) DCC address applies to
addresses >127.
The loco address per CVs #17 & #18 is valid, if
CV #29 (basic configuration), bit 5 = 1.
3.4
#19
Consist address
0,
1 – 127
129 - 255
( = 1 - 127 with
inverted Direc-
tion)
0
Alternate loco address for consist function:
If CV #19 > 0: Speed and direction is governed by this
consist address (not the individual address in CV #1 or
#17&18); functions are controlled by either the consist
address or individual address, see CVs #21 & 22.
Bit 7 = 1: Driving direction reversed
3.4
#20
Extended
consist address
0 - 102
0
“Extended” consist address: the value defined in CV #20
is multiplied by 100 and added to the value in CV #19,
which then results in the address in consist operation.
E.g. CV#20 = 12, CV#19=34 equals addr. 1234;
CV#20=100, CV#19=00 equals addr. 10000
3.4
#21
Functions
F1 - F8
in consist operation
0 - 255
0
Functions defined here will be controlled by the consist
address.
Bit 0 = 0: F1 controlled by individual address
= 1: ….
by consist address
Bit 1 = 0: F2 controlled by individual address
= 1: ….
by consist address
………. F3, F4, F5, F6, F7
Bit 7 = 0: F8 controlled by individual address
= 1: ….
by consist address
3.4
#22
Functions
F0 forw. rev.
in consist function
and
Activating
Auto-Consist
0 - 255
0
Select whether the headlights are controlled by the con-
sist address or individual address.
Bit 0 = 0: F0 (forw.) controlled by individual address
= 1: ….by consist address
Bit 1 = 0: F0 (rev.) controlled by individual address
= 1: ….
by consist address
Bit 2 = 0: F9 (forw.) controlled by individual address
= 1: ….
by consist address
Bit 3 = 0: F10 (forw.) controlled by individual address
= 1: ….
by consist address
Bit 4 = 0: F11 (forw.) controlled by individual address
= 1: ….
by consist address
Bit 5 = 0: F12 (forw.) controlled by individual address
= 1: ….
by consist address
Bit 7 = 1: F13 – F27 (all!) …. by consist address
Bit 6 = 1:
Auto-Consist
: The system changes automati-
cally between individual and consist address, if one of the
two addresses has speed 0 and the other has speed >0.
3.7
#23
Acceleration varia-
tion
0 - 255
0
For a temporary elevation/decrease (Bit 7 = 0/1) of the
acceleration time defined in CV #3.
CV
Denomination
Range
Default Description
3.7
#24
Deceleration varia-
tion
0 - 255
0
For a temporary elevation/decrease (Bit 7 = 0/1) of the
deceleration time defined in CV #4.
3.1
3.9
3.10
3.11
#27
BREAKING
MODES:
Position-dependent
Stopping
(“before a red sig-
nal”)
or driving slowly
by
“asymmetrical DCC
signal“ (“Lenz ABC“)
See chapter
“Stop in front of a
red signal and driv-
ing slowly... “
or “ZIMO HLU”
(see chapter ‘ZIMO
“signal-controlled
speed influence”
(HLU)’)
Automatic stopping
by DC brake section
(“Märklin brake sec-
tion”)
see chapter
“DC Brake Sections”
0 =
ABC not
active,
HLU
active,
other
brake sec-
tions not
active
Bit 0 and Bit 1 = 0: ABC not activated; no stopping
Bit 0 = 1: Stops are initiated if the voltage in the right rail
(in direction of travel) is higher than in the left rail.
This (CV #27 = 1) is the usual ABC application)
Bit 1 = 1: ABC stops are initiated if the voltage in the left
rail (in direction of travel) is higher than in the right rail.
If bit 0 or bit 1 =1 (only one of the two bits is set):
Stopping is directional, i.e. only in direction of travel to
the signal, travelling in opposite direction has no effect.
Bit 0 and Bit 1 = 1: Stops are independent of direction of
travel. See chapter “stop in front… (Lenz ABC)”
Bit 2 = 0: HLU train protection system (H, UH,…) active
= 1: Effect (halt, limit) of HLU deactivated
Bit 4 - DC braking section, if polarity is reversed
0 = disabled 1 = enabled
Bit 5 - DC braking section, if polarity
is equal to direction of travel
0 = disabled 1 = enabled
Bit 4 and bit 5 = 1 (CV #27 = 48): stopping when
DC voltage (e.g. by a diode) independent
of the polarity (“Märklin brake section”)
3.1
#28
RailCom Configu-
ration
0, 1, 2, 3,
65, 66, 67
3
resp.
67
(for Bit 6)
Bit 0 - RailCom Channel 1 (Broadcast)
Bit 1 - RailCom Channel 2 (Data)
Bit 6 - High voltage RailCom (large scale decoders onl.)
for all Bits: 0 = OFF
1 = ON
3.1
3,4
3.5
3.6
3.24
#29
Basic Configuration
0 - 63
14 =
0000
1
110
Bit 3 = 1
(RailCom
is switched
on),
and
Bits 1,2 = 1
(28 or 128
speed steps
and auto-
matic analog
operation
enabled)
Bit 0 - Train direction:
0 = normal,
1 = inverse
Bit 1 - number of speed steps
0 = 14,
1 = 28/128 speed steps
Bit 2 - automatic change to analog operation
0 = disabled,
1 = enabled
Bit 3 - RailCom („bi-directional communication“)
0 = deactivated
1 = activated
Bit 4 - Individual speed table:
0 = off, CVs #2, #5 and #6 are active.
1 = on, according to CVs #67 – #94
Bit 5 - Decoder address:
0 = primary address as per CV #1
1 = ext. address as per CVs #17 & #18
3.14
#33
NMRA Function
mapping F0
0 - 255
1
Function mapping for F0 forward
3.14
#34
NMRA Function
mapping F0
0 - 255
2
Function mapping for F0 reverse
3.14
#35
…
#46
Function mapping
F1 - F12
0 - 255
4, 8, 2, 4,
8, …
Function mapping for F1 - F12
