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CONTENTS
IM 01E20F02-01E
APPENDIX 2. INTEGRATOR (IT) BLOCK ....................................................... A-6
A2.1 Schematic Diagram of Integrator Block .............................................. A-6
A2.2 Input Process Section ......................................................................... A-7
A2.2.1 Determining Input Value Statuses ............................................... A-7
A2.2.2 Converting the Rate ..................................................................... A-7
A2.2.3 Converting Accumulation ............................................................. A-8
A2.2.4 Determining the Input Flow Direction ........................................... A-8
A2.3.1 Status of Value after Addition ...................................................... A-8
A2.3.2 Addition ......................................................................................... A-9
A2.4 Integrator ............................................................................................. A-9
A2.5 Output Process ................................................................................. A-11
A2.5.1 Status Determination .................................................................. A-11
A2.5.2 Determining the Output Value .................................................... A-12
A2.5.3 Mode Handling ........................................................................... A-13
A2.6.1 Reset Trigger .............................................................................. A-13
A2.6.2 Reset Timing .............................................................................. A-13
A2.6.3 Reset Process ............................................................................ A-14
A2.7 List of Integrator Block Parameters .................................................. A-15
APPENDIX 3. ARITHMETIC (AR) BLOCK ..................................................... A-17
A3.1 Schematic Diagram of Arithmetic Block ........................................... A-17
A3.2 Input Section ..................................................................................... A-18
A3.2.1 Main Inputs ................................................................................. A-18
A3.2.2 Auxiliary Inputs ........................................................................... A-18
A3.2.3 INPUT_OPTS ............................................................................. A-19
A3.2.4 Relationship between the Main Inputs and PV .......................... A-19
A3.5 List of the Arithmetic Block Parameters ........................................... A-22
APPENDIX 4. LINK MASTER FUNCTIONS ................................................... A-24
A4.1 Link Active Scheduler ....................................................................... A-24
A4.2 Link Master ........................................................................................ A-24
A4.3 Transfer of LAS ................................................................................. A-25
A4.4 LM Functions ..................................................................................... A-26
A4.5 LM Parameters .................................................................................. A-27
A4.5.1 LM Parameter List ...................................................................... A-27
A4.5.2 Descriptions for LM Parameters ................................................ A-29
