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2.2 Block Diagrams
2.2.1 SGD7S-R70A, -R90A, and -1R6A
2-7
2
S
electing a
S
ER
VOP
ACK
2.2
Block Diagrams
2.2.1
SGD7S-R70A, -R90A, and -1R6A
2.2.2
SGD7S-2R8A
Proce
ss
or
(PWM control, po
s
ition/
s
peed calculation
s
, etc.)
Control
power
s
upply
L1
B1/
B2
B
3
L2
L
3
1
2
L1C
L2C
U
V
W
Panel Operator
Digital Operator
Computer
CN
3
Option Module
CN11
Option Module
CN12
CN7
Current
s
en
s
or
Dynamic
brake circuit
CN2
S
ervomotor
ENC
Gate drive
Analog
voltage
converter
A/D
I/O
CN1
CN5
Encoder divided
pul
s
e output
Analog monitor
output
Reference pul
s
e input
Reference voltage
input
I/O
s
ignal
s
Voltage
s
en
s
or
Voltage
s
en
s
or
Vari
s
tor
Vari
s
tor
M
+
−
Relay
drive
+
−
CHARGE
-
+
-
-
Gate drive
overcurrent protection
Temperature
s
en
s
or
S
afety function
s
ignal
s
CN8
Main
circuit
power
s
upply
Control
power
s
upply
S_Ana
log
L1
B1/
B2
B
3
L2
L
3
1
2
L1C
L2C
U
V
W
CN
3
CN11
CN12
CN7
CN2
ENC
A/D
I/O
CN1
CN5
M
CHARGE
-
+
-
-
CN8
Proce
ss
or
(PWM control, po
s
ition/
s
peed calculation
s
, etc.)
Control
power
s
upply
Digital Operator
Computer
Option Module
Option Module
Current
s
en
s
or
Dynamic
brake circuit
S
ervomotor
Gate drive
Analog
voltage
converter
Encoder divided
pul
s
e output
Analog monitor
output
Voltage
s
en
s
or
Voltage
s
en
s
or
Vari
s
tor
Vari
s
tor
Relay
drive
Gate drive
overcurrent protection
Temperature
s
en
s
or
S
afety function
s
ignal
s
Main
circuit
power
s
upply
Control
power
s
upply
+
−
+
−
Panel Operator
Reference pul
s
e input
Reference voltage
input
I/O
s
ignal
s
S_Ana
log