Yamaha TF5, Service Manual

Page: 144 / 372

TF5/TF3/TF1
144
7-5-2. DSP_PORT
[Contents]
Inspect the signal routes of GPIO between CPU(IC905) and
DSP#1-5(IC101, IC201, IC301, IC401, IC501).
[Procedure]
<GUI>
Automatic judgment
<Display of inspection log>
In the case of PASS, “PASS: DSP_PORT”.
In the case of FAIL, the contents of failure are returned like
“FAIL: DSP_PORT IC101 IC201 IC301 IC401 IC501”.
IC101 /HALT_COM_DSP and /ERR_COM_DSP routes
between CPU(IC905) and DSP#1(IC101)
IC905(D14/T6)<–>IC101(T8/T11)
IC201 /HALT_COM_DSP and /ERR_COM_DSP routes
between CPU(IC905) and DSP#2(IC201)
IC905(D14/T6)<–>IC201(T8/T11)
IC301 /HALT_COM_DSP and /ERR_COM_DSP routes
between CPU(IC905) and DSP#3(IC301)
IC905(D14/T6)<–>IC301(T8/T11)
IC401 /HALT_COM_DSP and /ERR_COM_DSP routes
between CPU(IC905) and DSP#4(IC401)
IC905(D14/T6)<–>IC401(T8/T11)
IC501 /HALT_COM_DSP, /ERR_COM_DSP, /
REQ_MIDI routes between CPU(IC905) and
DSP#5(IC501)
IC905(D14/T6/U17)<–>IC101(T8/T11/T12)
7-5-3. DSP_SDIO
[Contents]
Inspect the signal routes of digital audio between
DSP#1-5(IC101, IC201, IC301, IC401, IC501)
[Procedure]
<GUI>
Automatic judgment
<Display of inspection log>
In the case of PASS, “PASS: DSP_SDIO”.
In the case of FAIL, the contents of failure are returned like
“FAIL: DSP_SDIO DSP12 DSP23 DSP51”.
DSP12 SDIO connection from DSP#1(IC101) to
DSP#2(IC201).
IC101(M14)
–> IC201(M14)
DSP13 SDIO connections from DSP#1(IC101) to
DSP#3(IC301).
IC101(A6) –> IC301(A6)
IC101(B6)
–> IC301(B6)
IC101(C6) –> IC301(C6)
IC101(P2) –> IC301(D6)
IC101(P1) –> IC301(A5)
7-5. DSP
The example of a screen of MAINCOM circuit board test.
7-5-1. DSP_SPI
[Contents]
Inspect the connection of SPI interface between CPU(IC905)
and DSP#1-5(IC101, IC201, IC301, IC401, IC501).
[Procedure]
<GUI>
Automatic judgment
<Display of inspection log>
In the case of PASS, “PASS: DSP_SPI”.
In the case of FAIL, the contents of failure are returned like
“FAIL: DSP_SPI IC101 IC201 IC301 IC401 IC501”.
IC101 SPI interface between CPU(IC905) and
DSP#1(IC101).
IC905(C15/A16/B16/A17/B17/U10/T10/T11/T13)
<–>IC101(P4/R4/T6/N5/P5/T9)
IC201 SPI interface between CPU(IC905) and
DSP#2(IC201).
IC905(C15/A16/B16/A17/B17/U10/T10/T11/V12)
<–>IC201(P4/R4/T6/N5/P5/T9)
IC301 SPI interface between CPU(IC905) and
DSP#3(IC301).
IC905(C15/A16/B16/A17/B17/U10/T10/T11/R7)
<–>IC301(P4/R4/T6/N5/P5/T9)
IC401 SPI interface between CPU(IC905) and
DSP#4(IC401).
IC905(C15/A16/B16/A17/B17/U10/T10/T11/T7)
<–>IC401(P4/R4/T6/N5/P5/T9)
IC501 SPI interface between CPU(IC905) and
DSP#5(IC501).
IC905(C15/A16/B16/A17/B17/U10/T10/T11/U6)
<–>IC501(P4/R4/T6/N5/P5/T9)