Yamaha AW4416, Service Manual

Page: 93 / 154

AW4416
52
PIN
NO.
I/O FUNCTION NAME
PIN
NO.
I/O FUNCTION NAME
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
DAUX
HDLT
DOUT
VFL
OPT
SYNC
MCC
WC
MCB
MCA
SKSY
XI
XO
P256
LOCKN
Vss
TST2
DIM1
DIM0
DOM1
DOM0
KM1
I
O
O
O
O
O
O
O
O
O
I
I
O
O
O
O
I
I
I
I
I
Auxiliary input for audio data
Asynchronous buffer operation flag
Audio data output
Parity flag output
Fs x 1 Synchronous output signal for DAC
Fs x 1 Synchronous output signal for DSP
Fs x 64 Bit clock output
Fs x 1 Word clock output
Fs x 128 Bit clock output
Fs x 256 Bit clock output
Clock synchronization control input
Crystal oscillator connection or external
clock input
Crystal oscillator connection
VCO oscillating clock connection
PLL lock flag
Logic section power (GND)
PLL time constant switching output
Data input mode selection
Data input mode selection
Data output mode selection
Data output mode selection
Clock mode switching input 1
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
RSTN
V
DD
A
CTLN
PCO
(NC)
CTLP
VssA
TSTN
KM2
KM0
FS1
FS0
CSM
EXTW
DDIN
LR
V
DD
ERR
EMP
CDO
CCK
CLD
I
I
O
I
I
I
I
O
O
I
I
I
O
O
O
O
I
I
System reset input
VCO section power (+5 V)
VCO control input N
PLL phase comparison output
VCO control input P
VCO section power (GND)
Test terminal. Open for normal use
Clock mode switching input 2
Clock mode switching input 0
Channel status sampling frequency
display output 1
Channel status sampling frequency
display output 0
Channel status output method selection
External synchronous auxiliary input
word clock
EIAJ (AES/EBU) data input
PLL word clock output
Logic section power (+5 V)
Data error flag output
Channel status emphasis control code
output
3-wire type microcomputer interface data
output
3-wire type microcomputer interface clock
input
3-wire type microcomputer interface load
input
YM3436DK (XG948E00) DIR2 (Digital Format Interface Receiver)
MAIN: IC507
PIN
NO.
I/O FUNCTION NAME
PIN
NO.
I/O FUNCTION NAME
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
VA5
VA4
VA3
VA2
VA1
VA0
/VWR
/VCE
/VRD
/RES
NC
NC
/RD
/WR
SEL2
SEL1
XG
XD
/CS
A0
V
DD
D0
D1
D2
D3
D4
D5
D6
D7
XD3
O
O
O
O
O
O
O
O
I
I
I
I
I
I
O
I
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
VRAM address bus
VRAM read/write
Memory control
Not used
Initial clear
Not used
Not used
Read strobe
Write strobe
Bus select
Bus select
Clock
Clock
Chip select
Data mode select
Power supply
Data bus
Data bus output for 4 bit dot
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60 XD2
XD1
XD0
XECL
XSCL
Vss
LP
WF
YDIS
YD
YSCL
VD7
VD6
VD5
VD4
VD3
VD2
VD1
VD0
VA15
VA14
VA13
VA12
VA11
VA10
VA9
VA8
VA7
VA6
NC
O
O
O
O
O
O
O
O
O
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
Data bus output for 4 bit dot
S driver enable, chain clock
Data bus shift clock
Ground
X driver latch pulse
Frame signal for X/Y driver
Power down signal for displaying off mode
Scan start signal
Scan shift clock
VRAM data bus
VRAM address bus
Not used
SED1335F0B (XQ595A00) LCDC (LCD Controller)
MAIN: IC602