XVME-100 Manual
March, 1987
Signal
Mnemonic
Connector
and
Pin Number
Signal Name and Description
A0I-A23
I A:24-30
ADDRESS B U S ( b i t s 1-23): Thrcc-state d r i v e n address
1C:15-30
lines that specify a memory address.
A24-A31
2B:4-11
ADDRESS B U S ( b i t s 24-31): T h r e e -state d r i v e n b u s
expansion address lines.
BBSY*
1B:1
BUS BUSY: Open-collector d r i v e n signal generated b y
the current D T B master t o indicate t h a t i t i s using the
bus.
BCLR*
1B:2
BUS CLEAR: Totem-pole driven signal generated b y the
bus a r b i t r a t o r t o request release b y t h e D T B master i f
a higher level is requesting the bus.
BERR*
1C:1 I
BUS ERROR: Open-collector driven signal generated b y
a slave. I t indicates t h a t a n unrecoverable e r r o r has
occurred and the bus cycle must be aborted.
BGOIN*-
1B:4,6,
BUS G R A N T ( 0 - 3 ) I N : To t e m -pole d r i v e n s i g n a l s
BG3IN*
8,10
generated b y the A r b i t e r o r Requesters. B u s G r a n t I n
and O u t signals f o r m a daisy-chained bus grant. T h e
Bus Grant I n signal indicates t o this board t h a t i t may
become the next bus master.
BGOOUT*-
1B:5,7,
BUS G R A N T ( 0 - 3 ) O U T: To t e m -pole d r i v e n signals
BG3OUT*
9,11
generated b y Requesters. T h e s e signals indicate t h a t a
DTB master i n t h e d a i s y -chain requires access t o t h e
bus.
Table A-1. V M E b u s Signal Identification (cont'd)
A-2
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Summary of Contents for XVME-100
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