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X V M E - 1 0 0 M a n u a l
March, 1987

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F i g u r e 2-6. L o c a t i o n o f Jumpers a n d Tc s t P o i n t s

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Summary of Contents for XVME-100

Page 1: ...rutilized and idle equipment along with credit for buybacks and trade ins Custom engineering so your equipment works exactly as you specify Critical and expedited services Leasing Rentals Demos In sto...

Page 2: ...KWH RAM ROM MEMORY MODULE X Y C O M 1987 Printed i n the U n i t e d States o f America Part Number 74100 001 XYCOM 750 N o r t h Maple Road Saline Michigan 48176 313 429 4971...

Page 3: ...all not be reproduced or copied without expressed written authorization from Xycom The information contained within this document is subject to change without notice Xycom does not guarantee the accur...

Page 4: ...2 4 2 4 Jumper Descriptions 2 5 2 4 1 VME Address Memory Chip Sizc 2 5 2 4 2 Address M o d i f i e r Decode 2 10 2 4 3 Memory Device Speed 2 11 2 4 4 Memory Device Pinout 2 12 2 4 5 Memory Backup Powe...

Page 5: ...2 9 2 4 M e m o r y Chip Pinouts 2 1 3 2 5 L o c a t i o n o f Jumper J34 2 1 5 2 6 L o c a t i o n o f Jumpers and Test Points 2 1 8 2 7 N o t c h e d E n d o f the Memory Chip 2 1 9 2 8 I n s t a l...

Page 6: ...s d a t a f r o m b e i n g w r i t t e n t o m e m o r y w h e n t h e voltage f a l l s b e l o w 4 75 Vo l t s T h e m o d u l e also h a s t h e o p t i o n o f asserting S Y S R E S E T u n d e r...

Page 7: ...XVME 100 Manual March 1987 1 3 M O D U L E O P E R AT I O N A L D E S C R I P T I O N Figure 1 I shows and operational block diagram o f the memory module Figure 1 1 Operational 1312cl Diagram 1 2...

Page 8: ...to 128K by 8 8K by 8 up to 128K by 8 8K by 8 up to 32K by 8 EEPROM m u s t h a v e q u i c k write polling technique and must employ TTL logic levels Dcvicc Speeds Supported 100ns 150ns 200ns 250ns Po...

Page 9: ...on condensing E x t r e m e l o w h u m i d i t y conditions m a y r e q u i r e special p r o t e c t i o n a g a i n s t s t a t i c discharge Sea level t o 10 000 f t 3048m Sea level to 50 000 f t...

Page 10: ...n f o r m a t i o n o n j u m p e r options jumper locations and power monitor circuit calibration and installation procedures 2 2 L O C A T I O N O F COMPONENTS R E L E VA N T T O I N S TA L L AT I O...

Page 11: ...XVME 100 Manual March 1987 DS1 DS2 B1 A B z 0 A A B A B A B U1 C a a C a J38 J39 B A U2 U18 C s z A O A A J42 J43 B B A A A B U3 U19 A B g U4 U20 J47 J 4 8 1 J 4 9 RN8 J50 J51 cn cn...

Page 12: ...1 J13 J 1 4 J15 J16 J7 J17 J18 C N C C A C U10 J19 J20 U11 U12 A C a B J A c_ co B C CD U13 U14 R3 A 0 0 D 3 a 3 3 c o J1 U5 TP2 0 0 TP1 U7 U6 RN2 U8 B A B A R N 5 J30 J31 J32 J33 U15 U21 U23 RN6 U16...

Page 13: ...i v e r enable Data Access bank 2 Program Access bank 1 Data Access bank 1 Program Access bank 2 Supervisor Only bank 1 VME Address bank 1 Supervisor Only bank 2 VME Address bank 2 VME Address b a n...

Page 14: ...e r e n t memory module parameters these parameters arc 1 V M E Address Memory Chip Sizc 2 A d d r e s s M o d i f i e r Decode 3 M e m o r y Device Speed 4 M e m o r y Device Pinout 5 M e m o r y Bac...

Page 15: ...J14 J23 J21 J22 J24 8K x 8 16K x 8 32K x 8 64K x 8 128K x 8 X A A A A X X A A A X X X A A X X X X A In In In In Out In In Out Out In In Out In Out In X X X X X X Use to define state of corresponding...

Page 16: ...alled i n bank 1 w i t h a VMEbus base address of 8E0000 Hcx J17 A J19 A J18 O U T J20 O U T J50 I N J51 O U T J52 I N JI4 O U T J23 I N J21 I N J22 I N J24 O U T Bank 1 will reside in memory address...

Page 17: ...BYTES BANK 1 EVENBYTES ODD BYTES BANK 2 BASEADDRESS 4 X DEVICESIZE 2 BASEADDRESS 2 x DEVICESIZE BASEADDRESS 2 x DEVICESIZE 2 BASEADDRESS WORDADDRESS BASEADDRESS 4 X DEVICESIZE 2 BASEADDRESS 2 x DEVIC...

Page 18: ...XVME 100 Manual March 1987 BANK 0 4 4x DEVICESIZE IN BYTES n 0 1 2 3 BASEADDRESS nx 4x DEVICESIZE IN BYTES Figure 2 3 A d d r e s s i n g 4 x Chip Size 2 9...

Page 19: ...u r i n g e a c h access o f a b a n k t h a t b a n k s L E D green o n t h e f r o n t panel w i l l momentarily light The second j u m p e r i s t h e data space select w h e n t h i s j u m p e r...

Page 20: ...m o r y Device Speed Two jumpers exist f o r each bank 4 total t o define t h e speed o f t h e memory devices Selections are 100 150 200 and 250 n s devices Ta b l e 2 4 lists the jumpers and speed d...

Page 21: ...B A B B A B B B Out A A B In X X X In Out C C B X A B In In In Out In In B B B B 2 4 4 M e m o r y Device Pinout Thcrc a r c seven jumpers f o r each o f t h e banks 14 total o n t h e X V M E 1 0 0 w...

Page 22: ...7 A5 C A4 C A3 C A2 C 8 A C 9 5 2 4 7 6 2 3 7 2 2 7 21 2 0 7 0 E As 7 A OE Vpp 3 A10 A5 A4 A3 Ag All O E Ao I I 00 1 1 to 1 9 1 1 1 1 3 8 07 06 A0 C OD C IC 1 1 1 1 8 9 D D 0076 A0 C 0o C 1 1 10 1 9 7...

Page 23: ...ry device pinout jumpers Memory Ty p e J 4 5 J 4 3 J 4 6 J 4 1 J 4 2 J 4 0 J 4 4 64k Bits A B A X X O U T Bank 2 Memory device pinout jumpers Memory Ty p e J 2 5 J 3 9 J 2 J 3 7 J 3 8 J 3 6 J 3 64K Bi...

Page 24: ...m the VMEbus T h e following chart shows the jumper configuration for each option Alternative Power Source J 3 4 J 3 5 None A O u t Battery B O u t 5V Standby A I n Factory shipped configuration Figur...

Page 25: ...vears The shelf life o f the battery is 10 years so data retention cannot be guaranteed to be over 10 years regardless of the RAM chips used CAUTION The following arc some general precautions about ba...

Page 26: ...T Bank 1 Power J 4 4 Battery A Vcc Bank 2 Power J 3 Battery A Vcc Alternate Power Source 5V Standby J34A J35 IN Bank 1 Power J 4 4 5V Standby A Vcc Bank 2 Power J 3 5V Standby A Vcc Alternate Power So...

Page 27: ...o w e r r e f e r e n c e t o t h e l e f t terminal o f J 1 5 C o n n e c t a v o l t meter or a scope to TP I 6 I f t h e v o l t a g e o f T P I i s h i g h 4 V t h e n t u r n P O T R 3 c o u n t...

Page 28: ...J7 J18 C N c N IV C N ca C K A J20 J9 RN3 J10 RN4 J11 J12 J13 I J14 J15 J16 POT R 3 T E S T POINTS J1 J8 R3 7 3 A m co o 0 IV a m co J1 TP2 TP1 U7 51 J17 J19 B A B A R N 5 U6 RN2 U8 U10 Figure 2 6 L o...

Page 29: ...d banks 2 R e f e r e n c e the notched end of the memory chips as shown in Figure 2 7 When installing a 28 p i n chip the chip should be oriented towards the bottom of the board leaving the bottom ho...

Page 30: ...M a k e certain t h a t t h e particular cardcage slot w h i c h y o u arc going t o use is clear and accessible 2 C e n t e r t h e board o n t h e plastic guides i n t h e slot so t h a t t h e hand...

Page 31: ...9 on the 3 U front panel B y removing the screw nut found inside the handle the e n t i r e handle assembly w i l l separate f r o m t h e 3 U f r o n t panel Remove the counter sunk screw 8 to separ...

Page 32: ...XVME 100 Manual March 1987 Figure 2 8 I n s t a l l a t i o n o f an XVME 945 6 U Front Pancl 2 23...

Page 33: ......

Page 34: ...acknowledge cycle i s i n progress IACKOUT 1A 22 INTERRUPT ACKNOWLEDGE OUT Totem pole driven signal I A C K I N and IACKOUT signals form a daisy chained acknowledge T h e IACKOUT signal indicates to t...

Page 35: ...DTB master i f a higher level is requesting the bus BERR 1C 1 I BUS ERROR Open collector driven signal generated by aslave I t indicates that an unrecoverable error has occurred and the bus cycle mus...

Page 36: ...n s i g n a l t h a t indicates d u r i n g b y t e a n d w o r d transfers t h a t a d a t a transfer w i l l occur on data bus lines DO D15 D TA C K 1A 16 D A T A T R A N S F E R A C K N O W L E D...

Page 37: ...e r r u p t requests L e v c l s e v e n i s t h e highest priority LWORD 1C 13 LONGWORD T h r e e state d r i v e n s i g n a l i n d i c a t e s t h a t the current transfer is a 32 bit transfer R E...

Page 38: ...reset WRITE IA 14 WRITE T h r e e state d r i v e n s i g n a l t h a t s p e c i f i c s t h e data t r a n s f e r c y c l e i n progress t o b e e i t h e r r e a d o r written A h i g h level ind...

Page 39: ...D BR3 A23 16 D TA C K AMO A22 17 GND AMI A2I 18 AS AM2 A20 19 GND AM3 A l 9 20 TACK GND A 18 21 I A C K I N SERCLK 1 A 17 22 I A C K O U T SERDAT 1 A 16 23 AM4 GND A 15 24 A07 IRQ7 Al 4 25 A06 1RQ6 A...

Page 40: ...e p o s i t i v e s i d e o f t h e 4 7 5 V p o w e r r e f e r e n c e t o t h e l e f t terminal o f J 1 5 C o n n e c t a v o l t meter or a scope to T P I 6 I f t h e v o l t a g e o f T P 1 i s...

Page 41: ...J5 3 1 1 C O J6 J7 J17 J18 C C C J19 J20 rJ J9 RN3 J10 RN4 J11 J12 J13 J14 J15 J16 POT R 3 T E S T POINTS J1 J8 R3 3 1 0 C oo J1 U5 7 U 6 TP2 TP1 U7 B A B A R N 5 RN2 U8 U10 Figure B 1 L o c a t i o n...

Page 42: ...ix C D I A G R A M A N D S C H E M AT I C S DS1 DS2 B1 A B z A B B B 0 0 U1 z C 3 t U17 c z 7 7 1 I r7 z a 3 J38 J39 B A U2 3 oT U18 C 3 3 Z S z J42 J43 A B U3 z en A B U19 z T z A B U4 U20 Z z R3 0 0...

Page 43: ...XVME 100 Manual March 1987 Operational Block Diagram C 2...

Page 44: ...OE 5 5 9 2 6 6 8 2 0 BA19 VCC C N D 9 0 8 8 1 8 V1176 Is 1 7 B816 2 1 1 1 6 o 17 1 5 4 r20 1 3 911 BA2I 6 BANK1 ADDRESS DECODE 74F521 8 8 2 2 84 P 1 A 2 7 P 1 A 2 8 1 L 3 4 7 7 4 F 3 7 3 8 87 P I A 2...

Page 45: ......

Page 46: ...6J31 RPM I 10K I 5V B1SEL 2 B2SEL 2 RN7 1 10K I I RN6 10K 5V L RN 10K D D D 5V mIN RN7 R N 6 10K I l i w B v L I O K I D D D D D I Low 5v RN7 1r 10K R16 10K D NOTES BAIO 2 BAIT 2 3 4 BAI6 2 3 4 BAI5...

Page 47: ......

Page 48: ...0 5 V 1P N 3 10K BUFFEN _ I cnnto7 r7L L BDO BOO 800 BOO BDO B D 0 BOO 8 0 0 10 5V BOO B09 BDI 0 BDI 8 0 1 2 B 0 1 3 _ 8014 8 D 1 5 PLSI 73 13 10 5 SA1 6 6 6 J 6 4 SE3 7 S 2 582 9 RN5 S V _ 1 1 L_ 10...

Page 49: ...20E 2 13 B I 15 11 1 1 270 B6 13 4 0 16 H i 17 2 IA 8 I 0 1 1 0 E IY D 84 19 U21 1 10 14 2 I I VBU 111 VCC G N O 3 12 22 J3 a s 5 IS B O 14 B 2 16 c P 1 8 31 I I I 15 9 5 19 oin 5 V VCC G N O 12 5V r...

Page 50: ...24 2 E V E N W R 2 2 D E 1 1 i 2 C E 1 2 2 4 8 A 1 5 3 4 5 oBA 90 Al 92 93 A4 95 96 A7 98 99 9 1 0 A l l 9 1 2 9 1 6 114 GNC DO 01 02 C 3 04 05 06 D 3 14 17 18 14 20 21 BOO B01 BOZ BOJ BOA B05 8 0 6...

Page 51: ...Al 0 A l l Al2 A16 U3 AND 00 01 02 03 04 05 06 Di 3 14 15 17 19 19 20 21 22 BOO BD1 BD2 1303 B05_ BC 6_ BD 5V 30 321 12 AO 11 A l 1 A 2 _ E I B B 0 0 A 1 9 A3 3 A 4 B B B B 1 A A 6 5 4 4 7 A5 BA7 6 A...

Page 52: ...BC3OLJT P 1 8 ACK N P 1 A 2 1 I ACKOUT P 1 4 2 2 J3 30 32 12 A O 11 A l 190 4 2 9 A 4 AS 6 5 27 26 23 25 2 28 3 3 29 24 A6 A7 AO A9 A10 A11 A l 2 A16 DO DI D2 04 05 D6 D7 13 14 15 17 18 19 20 21 1 0...

Page 53: ...92 93 94 95 96 97 98 A9 910 911 A l t 916 U1 4130 D O D D2 03 04 C5 D6 07 13 B D 0 4 B D 1 15 E I D L 17 B 0 3 _ BD4 B 0 5 20 B D 6 _ 21 B D 22 5V R12 1K BA1 1 2 BP2 I I BA4 9 BA5 BA6 7 BA7 BAO 5 BP1...

Page 54: ...dress bank 2 VME Address bank 1 VME Address bank 1 VME Address bank 1 VME Address bank 1 VME Address bank 1 VME Address bank 1 VME Address bank 1 VME Address bank 1 Memory Type bank 2 VME Address bank...

Page 55: ...ory Type bank 1 2 4 4 J45 Memory Type bank 1 2 4 4 J46 Memory Type bank 1 2 4 4 J47 Size Select bank 2 2 4 1 J48 Size Select bank 2 2 4 1 J49 Size Select bank 2 2 4 1 J50 Size Select bank 1 2 4 1 J51...

Page 56: ...In In In Out In In Out Out In In Out In Out In X X X X X X Use to define state of corresponding base address bit per above chart BANK 2 BASE ADDRESS BIT 1 0 A23 A22 A21 A20 A19 A18 A17 A16 A15 J16 Ou...

Page 57: ...cess 3 E H or 3AH J10 Out No Program Access W o n t respond to 3EH or 3AH Jumpers Description J15 In Supervisor Only A M 2 1 J15 Out Supervisor Non privileged A M 2 don t care J9 In Data Access R e s...

Page 58: ...ut In Table D 4 Memory Device Speed Jumpers BANK 1 BANK 2 Factory shipped configuration Alternative Power Source J 3 4 J 3 5 None A O u t Battery B O u t 5V Standby A I n Factory shipped configuration...

Page 59: ...5V Standby A Vcc Bank 2 Power J 3 5V Standby A Vcc Alternate Power Source None J34A J35 OUT factory shipped configuration Bank 1 Power Vcc Bank 2 Power Vcc J44 B J3 Binstalled t o prevent d r a w i n...

Page 60: ...uipment Have surplus equipment taking up shelf space We ll give it a new home Learn more Visit us at artisantg com for more info on price quotes drivers technical specifications manuals and documentat...

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