134
ROR
D0
K4
D.
n
1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0
SM22
0
SM22
※
※
Highest
bit
Lowest
bit
Cycle move right
Highest
bit
Lowest
bit
After
executing
once
X0
N bits
※
4-7-4
.
Bit shift left [SFTL]
1. Summary
Bit shift left
Bit shift left [SFTL]
16 bits
SFTL
32 bits
DSFTL
Execution
condition
rising/falling edge
Suitable
Models
XD, XL
Hardware
requirement
-
Software
requirement
-
2. Operands
Operands Function
Types
S
Source soft element head address
bit
D
Target soft element head address
bit
n1
Source data quantity
16 bits /32 bits, BIN
n2
Shift left times
16 bits/32 bits, BIN
3. Suitable soft components
*Notes: D includes D, HD; TD includes TD, HTD; CD includes CD, HCD, HSCD, HSD;
DM includes DM, DHM; DS includes DS, DHS.
Word
Operand
System
Constant Module
D
*
FD
TD
*
CD
*
DX
DY
DM
*
DS
*
K /H
ID
QD
n1
●
●
●
●
●
●
●
●
n2
●
●
●
●
●
●
●
●
Operand
System
X
Y
M
*
S
*
T
*
C
*
Dn.m
S
● ● ●
● ● ●
D
● ●
● ● ●
Bit