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164
4-9-6
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Floating Division [EDIV]
1. Summary
Floating Divide [EDIV]
16 bits
-
32 bits
EDIV
Execution
condition
Normally ON/OFF,
rising/falling edge
Suitable
Models
XD, XL
Hardware
requirement
-
Software
requirement
-
2. Operands
Operands Function
Data Type
S1
Division operation data address
32 bits, BIN
S2
Division operation data address
32 bits, BIN
D
Result address
32 bits, BIN
3. Suitable soft components
*Notes: D includes D, HD; TD includes TD, HTD; CD includes CD, HCD, HSCD, HSD;
DM includes DM, DHM; DS includes DS, DHS.
EDIV
D10
D20
D50
S1·
S2·
D·
X0
The floating point value of S1 is divided by the floating point value of S2. The result of the
division is stored in D as a floating point value.
If a constant K or H used as source data, the value is converted to floating point before the
division operation.
EDIV
D100
K100
D110
X1
The source data S2 is 0, the calculation will be error. The instruction will not work.
Note: the operand value must be floating numbers, otherwise the result will be error.
Operand
System
Constant Module
D
*
FD
TD
*
CD
*
DX
DY
DM
*
DS
*
K /H
ID
QD
S1
●
●
●
●
●
●
●
S2
●
●
●
●
●
●
●
D
●
●
●
●
Word
Description
(D11, D10) ÷ (D21, D20) → (D51, D50)
Binary Floating Binary Floating Binary Floating
(D101, D100) ÷ (K100) → (D111, D110)
Binary converts to Floating Binary Floating Binary Floating