XIA PZ-TIO, User Manual

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PZ-TIO Manual Version 1.01
© 2022 XIA LLC 29
PMODBena 0x01E R/W 0-7 enable output for PMOD pin 1-4, 7-10 on
J101
PMODCena 0x01F R/W 0-7 enable output for PMOD pin 1-4, 7-10 on
J102
WR_START_TAI 0x020-
0x022 W Specify WR start time (s) for data acquisition
WR_STOP_TAI 0x023-
0x025 W Specify WR stop time (s) for data acquisition
unused 0x026-
0x03F W Unused
8.2 Output Registers
Address range is 0x020 – 0x03F. Read only.
Register Address R/W Description (bit #)
CSROUT_L 0x020 R Run Status info bits
0 RunEnable
1 WR tm_link_up
2 SDA readback
3 WR tm_time_valid
9 nLive
Others reserved and 0
CSROUT_H 0x021 R Run Status info bits
0 Status of the VETO input
1 Status of the SYNC input
2 reserved real time
3 PTP trigger 3 from DP86430
4 PTP trigger 4 from DP86430
5 PTP trigger 8 from DP86430
6-7 unused and 0
8-15: fixed at 0xBE
reserved 0x023-
0x24 R reserved
HW_VERSION 0x025 R Firmware version number
(HW ID of firmware)
SNUM 0x026 R Serial number (copy)
SYS_TIME 0x027-
0x028 R Free running clk, resets at reboot, in ns units
TOTAL_TIME 0x029-
0x02C R Free running clk, resets at run start, in ns units
TM_TAI 0x02D-
0x02F R WR time (s)
TM_CYCLES 0x030-
0x031 R WR time (number of 16 ns cycles within s)
GPIO_IN 0x032 R Status of GPIO inputs
VETO_COUNT 0x033-
0x034 R Number of pulses on VETO input, resets at
run start
SYNC_COUNT 0x035-
0x036 R Number of pulses on SYNC input, resets at
run start
reserved 0x037-
0x03F R reserved