PZ-TIO Manual
Version 1.01
© 2022 XIA LLC
26
6.2 Control Parameters
Control parameters are intended for settings that affect the local logic in the FPGA.
Examples include enabling outputs on the output connectors. Currently many parameters
are unused.
Parameter Name
Units
Limits
Description
AUX_CTRL
Bits
Example of a single control bit from parameter
LOCAL_CONTROL_00
CLK_CTRL
0 or 1
reserved
WR_RUNTIME_CTRL
0 or 1
Reserved for conditioning the run start with White
Rabbit time
UDP_PAUSE
10..100
00
Parameters reserved for generating UDP data
packages sent out via White Rabbit interface
DEST_MAC0
12 digit
hex
SRC_MAC0
12 digit
hex
DEST_IP0
8 digit
hex
SRC_IP0
8 digit
hex
DEST_PORT0
0 .. 64K
SRC_PORT0
0 .. 64K
MCSRA_CWGROUP_00
0 or 1
Reserved control bits
MCSRA_P4ERUNSTATS_01
0 or 1
MCSRA_U_02..15
0 or 1
SYNC_AT_START
0 or 1
If 1, set counter to zero at run start time.
PMOD_A_OUTENA
bits
Bit 0..7 enables outputs on the PMOD-style
connector pins 1-4, 7-10.
PMOD_B_OUTENA
bits
PMOD_C_OUTENA
bits
