19
2
TRIGGER
Software Trigger
3
TPULSE
Generates a test pulse of 25 ns
cha_inh
0x108 - The corresponding channel to each bit (0 bis 15) which is set is inhibited.
cha_raw
0x10C - If the corresponding channel to each bit is set all ADC data that are
within WINDOW are transmitted and afterward all available analysis data
(including start, min and max pairs).
trig_level
0x110 - This value is the trigger level when bit 2 in cr register is set. Internally,
the actual baseline value is added to this value.
anal_ctrl
0x114 - Here it is possible to parametrize the pulse analysis:
Bit
Default
Function
3..0
8
Integral based detection:
this value times 4 indicates how high should
the integral be in order for a pulse to be
detected. In case of pile up the integral is
computed on the basis of the last minimum
value.
11..8 1
Distance from another maximum:
number of clock units after the last maximum
(start time point) from where a new pulse (even
a pile up) can be detected.
The default values are restored by reset or by writing 0. Zero as parameter is not
valid.
iw_start
0x118 - Begin of the supplementary integral window in the search-main window.
The time unit is the ADC sample rate (6,25 ns). The value must be bigger or equal
4, in order for the 4 values leading the window to be present for calculating the
pedestal.
iw_length
0x11C - Length of the integral window in units of the ADC clock. The end of the
integral windows plus 4 should not overcome the end of the main window. The
time unit is the ADC sample rate (6,25 ns).
sw_start
0x120 - (Trigger latency) Begin of the time window for the trigger time search
range. The value is subtracted from the trigger time and thus defines the beginning
of the time window. The range is -512 to 511 times 12,5 ns (±6,4 µs). A negative
value means trigger time before window.
sw_length
0x124 - Length of the time window. The time corresponds to the value plus 1
times 12,5 ns. The maximum value is 511, i.e. 6,4 µs.
Summary of constraints to be respected:
IW_START >= 4
IW IW_ 4 <= 2 * SW_LENGTH;
sw_intlength
0x128 - Integral length of pulse integrals in ADC sample rate units (6,25 ns). After
a reset the value is set to maximum (0x03FF). By default (i.e. with the maximum
value) the pulse integral is computed over the total pulse length. In case of pile
up, each pulse integration starts from the minimum before the peak and ends in the
Summary of Contents for AVM16
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