Wiener AVM16, User Manual

Page: 11 / 33

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5.1 Technical description
AVM16/AVX16 works with a sampling frequency of 160 MHz. ADC chips are LTC2240 with 12
Bit resolution. The input circuit differential amplifier is AD8132. The coupling is capacitive, thus
the baseline is situated in the middle of the measurement range.
The logic is implemented on 4 SPARTAN-3 FPGAs, each one serving 4 ADCs, and one
VIRTEX-5 Control FPGA as interface between the 4 ADC FPGAs and the VME Bus. The
Control FPGA is VIRTEX-5 XC5VLX50T. The FPGAs serving the ADCs are SPARTAN-3
XC3S1000.
ADC
ADC
ADC
ADC
DPRAM
FIFO
4 x
XC3S1000
ADC
ADC
ADC
ADC
DPRAM
FIFO
4 x
XC3S1000
ADC
ADC
ADC
ADC
DPRAM
FIFO
4 x
XC3S1000
ADC
ADC
ADC
ADC
DPRAM
FIFO
4 x
XC3S1000
gateway
XC5VLX50T
Data Request
P2 VME BUS
P1 VME BUS
Data Bus
Figure 5: Chips diagram