Functional Overview
MS-4900, Rev. A
5–
11
demultiplexing capability.
As shown in Figure 5-3, the processor connects to the tuner, controlling its
frequency setting and the bit rate used by the demodulator. The processor programs
the TDD at start-up to match the frame image stored in memory. The TDD routes
the aggregate data according to this image. Some of the bits in the frame can be
routed to the processor and may be processed there by the statistical demultiplexer.
The UART chip in the processor drives the Serial 1 output to an external device.
(The Serial 1 port is the only output port in an IDR V1000 basic unit.)
Statistical
Demultiplexer
(Stat Demux)
Packetized data, sent in stat mux format from the NCC, is de-multiplexed (and de-
packetized) in the receiver. The packets include session, data, and control
information used by the to decrypt, decompress, and direct the result to specific
serial port destinations.
Since statistically multiplexed data provides so much information about how the
message is to be handled, the IDR V1000 screen displays show useful status
information about the reception and delivery of the packets. (Refer to Section 4 on
interpreting these screens.)
Summary of Contents for IDR V1000
Page 21: ...Using the Front Panel 3 8 MS 4900 Rev A...
Page 46: ...Functional Overview MS 4900 Rev A 5 13 Figure 5 5 Four Port Daughtercard Model...
Page 48: ...Functional Overview MS 4900 Rev A 5 15...
Page 54: ...Appendix B Pin out Tables B 4 MS 4900 Rev A...
Page 61: ...Glossary G 6 MS 4900 Rev A...