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written agreement.

WM_PRJ_Q2686_PTS_001-010

June 30, 2009

Q2686 Wireless CPU

3.14.1.2

Power-OFF

To power-OFF the Wireless CPU

correctly, the application must reset the

ON/OFF signal and then send the AT+CPOF command to deregister from the

network and switch off the Wireless CPU

Once the "OK" response is issued by the Wireless CPU

, the power supply can

be switched off.

POWER SUPPLY

ON/OFF

AT COMMAND

STATE OF THE

Wireless CPU

AT+CPOF

Wireless CPU

READY

Wireless CPU

OFF

22 A

Network dependent

OK response

BB+RF

= overall current consumption (Base Band + RF part)

Figure 10: Power-OFF sequence

Additional notes:

If the ON/~OFF pin is maintained to ON (High Level), then the Wireless

CPU® can’t be switched OFF.

Connecting a charger on the Wireless CPU

as exactly the same effect

than setting the ON/~OFF signal. In particular the Wireless CPU

will

not POWER-OFF after the AT+CPOF command, unless the Charger is

disconnected.

Summary of Contents for Q2686

Page 1: ...Revision 010 Date June 30 2009 Reference WM_PRJ_Q2686_PTS_001 Q2686 Wireless CPU Product Technical Specification...

Page 2: ...Not to be distributed or divulged without prior written agreement WM_PRJ_Q2686_PTS_001 010 June 30 2009 Q2686 Wireless CPU Q2686 Wireless CPU Product Technical Specification Reference WM_PRJ_Q2686_PT...

Page 3: ...Q2686 version Overview section Update Cautions Trademarks and Copyright Update Electrical information for digital I O see chapter 3 3 Update SPI max frequency see chapter 3 4 Update available GPIO se...

Page 4: ...h Add ATEX 94 9 CE directive information in section 4 4 Update reference documents Update section 3 6 Main serial link UART1 Other minor corrections 008 June 2008 Software update Open AT Software Suit...

Page 5: ...G EGSM GPRS 900 1800 850 1900 MHz version with 64 Mb of Bursted Flash memory and 16 Mb of SRAM 64 16 The Q2686 Wireless CPU supports a powerful open software platform Open AT Open AT is the world s mo...

Page 6: ...filed or registered trademarks of Wavecom S A in France and or in other countries All other company and or product names mentioned may be filed or registered trademarks of their respective owners Copy...

Page 7: ...S_001 010 June 30 2009 Q2686 Wireless CPU Web Site Support General information about Wavecom and its range of products www wavecom com Specific support about the Q2686 Wireless CPU www wavecom com Q26...

Page 8: ...anics 17 2 1 3 GSM GPRS Features 17 2 1 4 Interfaces 17 2 1 5 Operating System 18 2 1 6 Connection Interfaces 18 2 2 Functional Architecture 19 2 2 1 RF Functionalities 20 2 2 2 Baseband Functionaliti...

Page 9: ...6 3 11 1 2 MIC2 Microphone Inputs 47 3 11 2 Speaker Features 49 3 11 2 1 Speakers Outputs Power 49 3 11 3 Pin description 51 3 12 Buzzer Output 52 3 13 Battery Charging Interface 53 3 13 1 Ni Cd Ni Mh...

Page 10: ...icrophone 85 5 4 Speaker 86 5 5 Antenna Cable 86 5 6 RF Board to board Connector 86 5 7 GSM Antenna 86 6 Design Guidelines 87 6 1 HARDWARE and RF 87 6 1 1 EMC Recommendations 87 6 1 2 Power Supply 88...

Page 11: ...fidential Page 10 97 This document is the sole and exclusive property of WAVECOM Not to be distributed or divulged without prior written agreement WM_PRJ_Q2686_PTS_001 010 June 30 2009 Q2686 Wireless...

Page 12: ...ANSCEIVER COAX UFL IMP ANTENNA Q 2 6 8 6 B O A R D T O B O A R D I N T E R F A C E C O N N E C T O R CHARGER RTC USB detection KEYPAD Figure 1 Functional architecture 19 Figure 2 Power supply during b...

Page 13: ..._Q2686_PTS_001 010 June 30 2009 Q2686 Wireless CPU Figure 11 Reset sequence waveform 63 Figure 12 Real Time Clock power supply 67 Figure 13 LED0 state during RESET and Initialization time 71 Figure 14...

Page 14: ...pen AT Software Suite v2 0 1 1 1 Open AT Software Documentation 1 Getting started with Open AT 2 Tutorial for Open AT 3 Tools Manual for Open AT 4 Basic Development Guide for Open AT 5 ADL User Guide...

Page 15: ...ry CAN Controller Area Network CB Cell Broadcast CEP Circular Error Probable CLK CLocK CMOS Complementary Metal Oxide Semiconductor CS Coding Scheme CTS Clear To Send DAC Digital to Analog Converter d...

Page 16: ...obal System for Mobile communications HR Half Rate I O Input Output LED Light Emitting Diode LNA Low Noise Amplifier MAX MAXimum MIC MICrophone MIN MINimum MMS Multimedia Message Service MO Mobile Ori...

Page 17: ...l Time Clock RTCM Radio Technical Commission for Maritime services RTS Request To Send RX Receive SCL Serial CLock SDA Serial DAta SIM Subscriber Identification Module SMS Short Message Service SPI Se...

Page 18: ...tive 2002 95 EC which sets limits for the use of certain restricted hazardous substances This directive states that from 1st July 2006 new electrical and electronic equipment put on the market does no...

Page 19: ...Q2686 Wireless CPU 2 1 5 Operating System Real Time Clock RTC with calendar Battery charger Echo cancellation noise reduction quadri codec Full GSM or GSM GPRS Operating System stack 2 1 6 Connection...

Page 20: ...tional Architecture The global architecture of the Q2686 Wireless CPU is displayed below AUDIO POWER UART2 PCM UART1 USB SIM 1 8V 3V EBI DAC ADC GPIO SPI1 I2C SPI2 EXT_IT RF INTERFACE SUPPLY INTERFACE...

Page 21: ...oise Amplifier Offset PLL Phase Locked Loop transmitter Frequency synthesizer Digitally controlled crystal oscillator DCXO Tx Rx FEM Front End Wireless CPU for quad band GSM GPRS 2 2 2 Baseband Functi...

Page 22: ...IM connector or a battery connection The available interfaces on the GPC are described below Chapter Name Driven by AT commands Driven by Open AT 3 4 Serial Interface X 3 5 Keyboard Interface X X 3 6...

Page 23: ...TT Uripp T 4 615 ms t 577 s Figure 2 Power supply during burst emission In communication mode a GPRS class 10 terminal emits 1154 s radio bursts every 4 615ms Only the VBATT input is necessary to supp...

Page 24: ...CPU is in Alarm Off mode no voltage has to be applied on any pin of the 100 pin connector except on Vbatt pins 1 to 4 BAT RTC pin 7 for RTC operation or ON OFF pin 19 to power ON the Wireless CPU 3 2...

Page 25: ...art up current is defined as follow During the first second following the Power on a peak of current appears This peak of current is called Istartup current and has a duration of about 161 ms Typical...

Page 26: ...9 9 mA PCL5 TX power 33dBm 209 217 222 1462 TX mA 850 900 MHz PCL19 TX power 5dBm 85 6 93 8 98 257 TX mA PCL0 TX power 30dBm 153 162 166 894 TX mA Connected Mode 1800 1900 MHz PCL15 TX power 0dBm 82 8...

Page 27: ...33 39 44 196 RX mA Paging 9 Rx burst occurrence 2s N A N A N A N A Slow Idle Mode Paging 2 Rx burst occurrence 0 5s N A N A N A N A Fast Standby Mode 33 38 44 50 mA Slow Standby Mode N A N A N A N A...

Page 28: ...ode 49 63 69 150 mA Slow Standby Mode N A N A N A N A PCL5 TX power 33dBm 210 220 230 1385 TX mA 850 900 MHz PCL19 TX power 5dBm 84 94 104 290 TX mA PCL0 TX power 30dBm 155 163 169 880 TX mA Connected...

Page 29: ...s CPU Open AT Software Suite v2 The VBATT voltage is at the typical value of 3 6V Four significant operating mode consumption waveforms are described Connected Mode PCL5 Tx power 33dBm Slow Idle mode...

Page 30: ...RJ_Q2686_PTS_001 010 June 30 2009 Q2686 Wireless CPU 3 2 2 4 2 Slow Idle Mode Current Waveform Slow Idle mode Paging 2s Current A Time s 0 02 0 0 02 0 04 0 06 0 08 0 1 0 12 0 14 0 16 0 1 2 3 4 5 6 7 3...

Page 31: ...Wireless CPU 3 2 2 4 4 Transfer Mode Class 10 Current Waveform Transfer mode Class 10 33dBm Current A Time s 0 0 2 0 4 0 6 0 8 1 1 2 1 4 1 6 0 0 002 0 004 0 006 0 008 0 01 0 012 0 014 3 2 2 5 Power Su...

Page 32: ...8 Parameter I O type Minim Typ Maxim Condition Internal 2 8V power supply VCC_2V8 2 74V 2 8V 2 86V VIL CMOS 0 5V 0 84V VIH CMOS 1 96V 3 2V VOL CMOS 0 4V IOL 4 mA VOH CMOS 2 4V IOH 4 mA IOH 4mA Input O...

Page 33: ...en Drain 2V VIL Open Drain 0 8V VOL Open Drain 0 4V SDA1 GPIO27 and SCL1 GPIO26 IOL Open Drain 3mA The reset states of the I Os are given in each interface description chapter Definitions of these sta...

Page 34: ...he SPIx LOAD signal SPI speed is from 102 kbit s to 13 Mbit s in master mode operation 3 or 4 wire interface 5 wire possible with the optional SPIx LOAD signal SPI mode configuration 0 to 3 for more d...

Page 35: ...PI transfer with 4 wire configuration in master mode 0 Figure 4 SPI Timing diagrams Mode 0 Master 4 wires AC characteristics Signal Description Minimum Typ Maximum Unit CLK cycle SPI clock frequency 0...

Page 36: ...I1 IO 25 I O 2V8 Z SPI Serial input output GPIO29 SPI1 I 24 I 2V8 Z SPI Serial input GPIO30 SPI1 LOAD 22 O 2V8 Z SPI load GPIO31 For Open drain 2V8 and 1V8 voltage characteristics and Reset state defi...

Page 37: ...he maximum speed transfer range is 400kbit s fast mode f mode For more information on the bus see the I C Bus Specification Version 2 0 from PHILIPS 13 3 4 2 1 I C Waveforms I C bus waveform in master...

Page 38: ...U No discrete components such as Rs Cs Resistors Capacitors are needed Keyboard interface pin description Signal Pin number I O I O type Reset state Description Multiplexed with ROW0 68 I O 1V8 0 Row...

Page 39: ...nformation for digital I O for Open drain 2V8 and 1V8 voltage characteristics and for Reset state definition According to PC view With the Open AT Software Suite v2 when the UART1 service is used the...

Page 40: ...Other signals and their multiplexes are not available Please refer to technical appendixes of AT commands User Guide 7 for more information For use with 4 wire serial interface CT103 TXD1 CT104 RXD1 C...

Page 41: ...and Reset state definition According to PC view The Q2686 is designed to operate using all the serial interface signals In particular it is recommended to use RTS and CTS for hardware flow control in...

Page 42: ...1 General Description The five signals are SIM VCC SIM power supply SIM RST reset SIM CLK clock SIM IO I O port SIMPRES SIM card detect The SIM interface controls a 3V 1V8 SIM This interface is fully...

Page 43: ...ent 20 A 0 9xSIMVCC V SIM IO VOH Source current 20 A 0 8xSIMVCC SIM RST SIM IO SIM CLK VOL Sink current 200 A 0 4 V SIMVCC 2 9V IVCC 1mA 2 84 2 9 2 96 V SIM VCC Output Voltage SIMVCC 1 8V IVCC 1mA 1 7...

Page 44: ...ltiplexed with Reserved 42 Do not used GPIO0 43 I O 2V8 Undefined 32kHz GPIO1 51 I O 1V8 0 Not mux GPIO2 53 I O 1V8 0 Not mux GPIO3 50 I O 1V8 Z INT0 GPIO4 59 I O 1V8 Pull up COL0 GPIO5 60 I O 1V8 Pul...

Page 45: ...IO31 22 I O 2V8 Z GPIO32 26 I O 2V8 Z SPI2 CLK GPIO33 27 I O 2V8 Z SPI2 IO GPIO34 29 I O 2V8 Z SP2 I GPIO35 28 I O 2V8 Z GPIO36 71 I O 2V8 Z CT103 TXD1 GPIO37 73 I O 2V8 1 CT104 RXD1 GPIO38 72 I O 2V8...

Page 46: ...onitor external temperature useful for safety power off in case of application over heating for Li Ion battery ADC2 input can be used for customer application ADC pin description Signal Pin number I O...

Page 47: ...e is strongly recommended When using a single ended connection be sure to have a very good ground plane a very good filtering as well as shielding in order to avoid any disturbance on the audio path T...

Page 48: ...itor to connect an audio signal provided by an active generator Only a passive microphone can be directly connected to the MIC2P and MIC2N inputs This value is obtained with digital gain 0 and for fre...

Page 49: ...2000 4 77 5 104 Working voltage MIC2P MIC2N AT VGT 700 4 346 466 mVrms Positive 7 35 Maximum rating voltage MIC2P or MIC2N Negative 0 9 V The input voltage depends of the input micro gain set by AT co...

Page 50: ...ring as well as shielding in order to avoid any disturbance on the audio path Parameter Typ Unit Connection Z SPK1P SPK1N 16 or 32 single ended mode Z SPK2P SPK2N 4 single ended mode Z SPK2P SPK2N 8 D...

Page 51: ...pp RL Load resistance 14 5 32 RL 16 40 85 mA IOUT Output current single ended peak value RL 32 22 mA RL 16 AT VGR 1600 25 mW POUT RL 32 AT VGR 1600 16 27 mW RPD Output pull down resistance at power do...

Page 52: ...0 52 k VPD Output DC voltage at power down 100 mV The output voltage depends of the output speaker gain set by AT command Please refer to the document AT command User Guide 7 This value is given in dB...

Page 53: ...is an open drain output A buzzer can be directly connected between this output and VBATT The maximum current is 100 mA PEAK Pin description of PWM Buzzer output Signal Pin number I O I O type Reset s...

Page 54: ...s used battery temperature is monitored via the ADC1 BAT TEMP input One more charging procedure is provided by the Q2686 Wireless CPU This is called Pre charging mode but is a special charging mode be...

Page 55: ...t is the sole and exclusive property of WAVECOM Not to be distributed or divulged without prior written agreement WM_PRJ_Q2686_PTS_001 010 June 30 2009 Q2686 Wireless CPU The battery level is monitore...

Page 56: ...ghly recommended to prevent battery damage during the charging phase The Li Ion charger algorithm can be broken down into three phases 1 Constant charge 2 Beginning of pulse charge 3 End of pulse char...

Page 57: ...ry the minimum voltage must be higher than PCM lock level Note When pre charging is launched the LED0 output blinks automatically WARNING The Q2686 Wireless CPU can not release the PCM protection insi...

Page 58: ...e for I 0 6 V CHG IN pin 6 8 DC Current 400 800 mA To be configured as specified by the battery manufacturer Take care this value has to be selected in function of the power consumption mode used plea...

Page 59: ...s Parameter I O type Minimum Maximum Unit VIL CMOS VBATT x 0 2 V VIH CMOS VBATT x 0 8 VBATT V Warning All external signals must be inactive when the Wireless CPU is OFF to avoid any damage when starti...

Page 60: ...factors have a minor influence the number of parameters stored in EEPROM by the AT commands received so far the ageing of the hardware components especially the flash memory the temperature condition...

Page 61: ...es 1 Typical power up initialization time figures for best cases conditions no power loss recovery fast and new flash memory approximate 3 5 seconds in every firmware version But releasing ON OFF afte...

Page 62: ...response is issued by the Wireless CPU the power supply can be switched off POWER SUPPLY ON OFF AT COMMAND STATE OF THE Wireless CPU AT CPOF Wireless CPU READY Wireless CPU OFF I 22 A Network depende...

Page 63: ...pin must be connected to VCC_1V8 for this specific download Operating mode description BOOT Operating mode Comment Leave open Normal use No download Leave open Download XModem AT command for Download...

Page 64: ...s An Operating System reset is to be preferred to a hardware reset Reset sequence To activate the emergency reset sequence the RESET signal must be set to low for 200 s minimum As soon as the reset is...

Page 65: ...RESET time Rt 1 200 s RESET time Rt 2 at power up only 20 40 100 ms Cancellation time Ct 34 ms VH 0 57 V VIL 0 0 57 V VIH 1 33 V internal pull up VH Hysterisis Voltage 1 This reset time is the minimum...

Page 66: ...edge Low to high and high to low edge When used the interrupt inputs must not be left open If not used they must be configured as GPIOs Pin description Signal Pin number I O I O type Reset state Descr...

Page 67: ...o connect pull up resistor VCC_2V8 and VCC_1V8 must be used as a reference supply These voltages supplies are available when the Wireless CPU is ON Pin description Signal Pin number I O I O type Descr...

Page 68: ...a back up power supply is needed to save date and time when VBATT is switched off VBATT 0V 2 5V regulator 1 8V regulator from VBATT to RTC Q2686 BAT RTC Pin 7 Figure 12 Real Time Clock power supply If...

Page 69: ...fidential Page 68 97 This document is the sole and exclusive property of WAVECOM Not to be distributed or divulged without prior written agreement WM_PRJ_Q2686_PTS_001 010 June 30 2009 Q2686 Wireless...

Page 70: ...reless CPU is OFF Wireless CPU OFF 2 8V VBATT 3 2V Pre charge flash LED ON for 100 ms OFF for 900 ms Wireless CPU is OFF Pre charging mode charger must be connected on CHG IN to activate this mode Per...

Page 71: ...fidential Page 70 97 This document is the sole and exclusive property of WAVECOM Not to be distributed or divulged without prior written agreement WM_PRJ_Q2686_PTS_001 010 June 30 2009 Q2686 Wireless...

Page 72: ...d Initialization time LED0 state is high during the RESET time and undefined during the software initialization time During software initialization time for 2 seconds max after RESET cancellation the...

Page 73: ...ly with 6 slots by frame user only on slot 0 Bit rate single clock mode at 768kHz only 16 bits data word MSB first only Linear Law only no compression law Long Frame Synchronization only Push pull con...

Page 74: ...SLOT 0 SLOT 1 SLOT 5 SLOT 0 SLOT 0 SLOT 1 SLOT 5 SLOT 0 SLOT 5 SLOT 5 PCM SYNC PCM CLK PCM IN PCM OUT Tsync_high Tsync_low End of frame Begining of frame Figure 14 PCM frame waveform TOUTdelay TSYNC...

Page 75: ...LK time 154 ns TCLK cycle PCM CLK period 1302 ns TIN setup PCM IN setup time 50 ns TIN hold PCM IN hold time 50 ns TOUT delay PCM OUT delay time 20 ns Pin description of the PCM interface Signal Pin n...

Page 76: ...ace features 12Mbit s full speed transfer rate 3 3V typ compatible USB Softconnect feature Download feature is not supported by USB CDC 1 1 ACM compliant NOTE A 5V to 3 3V typ voltage regulator is nee...

Page 77: ...it but this function can be implemented externally and can be driven using a GPIO The antenna cable and connector should be selected in order to minimize losses in the frequency bands used for GSM 850...

Page 78: ...e Minimum output power GSM1800 PCS1900 0 dBm 5 dB at ambient temperature 3 23 3 Antenna Specifications The antenna must meet the following requirements The optimum operating frequency depends on the a...

Page 79: ...C_1V8 I SIM Detection SIM reset Output O 1V8 or 3V SIM RST 13 14 SIM CLK 1V8 or 3V O SIM Clock Buzzer Output O Open Drain BUZZER 0 15 16 BOOT VCC_1V8 I Not Used LED0 Output O Open Drain LED0 17 18 RES...

Page 80: ...I O VCC_2V8 GPIO23 55 56 USB DM VPAD USB I O USB Data I O VCC_2V8 GPIO22 57 58 GPIO24 VCC_2V8 I O Keypad column 0 I O VCC_1V8 GPIO4 COL0 59 60 COL1 GPIO5 VCC_1V8 I O Keypad column 1 Keypad column 2 I...

Page 81: ...ux Nominal Pin Number Nominal Mux Voltage I O Description NC 3 83 84 NC 2 NC 5 85 86 NC 4 NC 7 87 88 NC 6 NC 9 89 90 NC 8 NC 11 91 92 NC 10 NC 13 93 94 NC 12 NC 15 95 96 NC 14 NC 17 97 98 NC 16 NC 19...

Page 82: ...nform with the AT Command User Guide 7 Signal Name Q2686 with SW preceding Open AT Software Suite v2 Signal Name Q2686 with SW from Open AT Software Suite v2 Description I O PIN number VBATT ADC0 VBAT...

Page 83: ...ied requirements and this deviation does not affect the ability of the Wireless CPU to connect to the cellular network and function fully as it does within the Class A range Q2686 ENVIRONNEMENTAL CLAS...

Page 84: ...he conformity of the final product with ATEX 94 9 CE directive the following datas must be taken into account Sum of all capacitors 84 F Sum of all inductances 12 H 4 5 Mechanical Specifications 4 5 1...

Page 85: ...84 97 This document is the sole and exclusive property of WAVECOM Not to be distributed or divulged without prior written agreement WM_PRJ_Q2686_PTS_001 010 June 30 2009 Q2686 Wireless CPU Figure 17...

Page 86: ...AXK500147BN1J The stacking height is 3 0 mm Wavecom recommends that you use the AXK500147BN1J connector for your application to benefit from Wavecom s prices For more information contact Wavecom spec...

Page 87: ...UF L Ref U FL R SMT UF L cable assemblies Between series cable assemblies More information is also available from http www hirose connectors com A coaxial cable can also be soldered on the RF pad The...

Page 88: ...he application to the RF receiver in the receiver band ESD protection is mandatory on all signals which have external accessibility typically human accessibility See Q2686 Wireless CPU Customer Design...

Page 89: ...The power supply is one of the key issues in the design of a GSM terminal A weak power supply design could in particular affect EMC performance The emission spectrum The phase error and frequency erro...

Page 90: ...ocument is the sole and exclusive property of WAVECOM Not to be distributed or divulged without prior written agreement WM_PRJ_Q2686_PTS_001 010 June 30 2009 Q2686 Wireless CPU 6 1 3 Layout Requiremen...

Page 91: ...ow regular changes in the GPRS standard and to offer a state of the art Operating System Wavecom recommends that the application designed around a Wireless CPU or Wireless CPU based product allow easy...

Page 92: ...roup Services and System Aspects Digital cellular telecommunications system Phase 2 General Packet Radio Service GPRS Service description Stage 2 Release 1998 3GPP TS 43 064 V5 0 0 2002 04 Technical S...

Page 93: ...Core Network Digital cellular telecommunications system Phase 2 Point to Point PP Short Message Service SMS support on mobile radio interface Release 1998 3GPP TS 45 005 v5 5 0 2002 08 Technical Spec...

Page 94: ...rk PLMN and the Integrated Services Digital Network ISDN or Public Switched Telephone Network PSTN GSM 09 07 version 8 0 0 Release 1999 3GPP TS 51 010 1 v5 0 0 2002 09 Technical Specification Group GS...

Page 95: ...n other devices Installed in other portable devices the exposure conditions require a separate equipment authorization The license module had a FCC ID label on the module itself The FCC ID label must...

Page 96: ...lth effects of using GSM terminals Although research on health effects from RF energy has focused on the current RF technology for many years scientists have begun research regarding newer radio techn...

Page 97: ...e laws and the regulations regarding the use of cellular devices in the area where you have to drive as you always have to comply with them When using your GSM terminal while driving please give full...

Page 98: ...Areas To avoid interfering with blasting operations turn your unit OFF when you are in a blasting area or in areas posted turn off two way radio Construction crew often uses remote control RF devices...

Page 99: ...is Drive Suite 300 Research Triangle Park North Carolina USA Tel 1 919 237 4000 Fax 1 919 237 4140 WAVECOM Asia Pacific Unit 201 207 2nd Floor Bio Informatics Centre No 2 Science Park West Avenue Hong...

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