VersaLogic VL-586-1, Reference Manual

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I/O Configuration
VL-586-1 Reference Manual Configuration – 27
I/O M
AP
Various regions of the 64K I/O space are divided up and can be routed to either the PC/104 or
the STD/STD 32 bus interfaces. The IOMAP1 and IOMAP2 bits in the IOMMAP Register (see
page 61) control the routing of these areas. The control bits default to values established in the
CMOS Setup
Advanced Configuration screen, however, they can also be manipulated in real
time under program control.
0000h 00FFh On Board Devices
0100h 016Fh IOMAP2
0 = PC/104 Bus
1 = STD Bus (IOEXP Signal Driven High)
0177h 01EFh IOMAP2
0 = PC/104 Bus
1 = STD Bus (IOEXP Signal Driven High)
01F0h 01FFh Undefined
0200h 027Fh IOMAP2
0 = PC/104 Bus
1 = STD Bus (IOEXP Signal Driven High)
0280h 02E7h Undefined
02E8h 02EFh (COM4) IOMAP1
0 = PC/104 Bus
1 = STD Bus (IOEXP Signal Driven High)
02F0h 02FFh Undefined
0300h 03E7h PC/104 Bus
03E8h 03EFh (COM3) IOMAP1
0 = PC/104 Bus
1 = STD Bus
03F0h 03FFh On Board Devices
0400h 0FFFh PC/104 Bus
1000h FBFFh STD Bus
(IOEXP Signal Driven High)
FC00h FFFFh STD Bus
(IOEXP Signal Driven Low)