Interfaces and Connectors
VL-EPIC-25 Reference Manual
51
SPX
Up to four serial peripheral expansion (SPX) devices can be attached to the Iguana at connector
J27 using the VL-CBR-1401 or VL-CBR-1402 cable. The SPX interface provides the standard
serial peripheral interface (SPI) signals: SCLK, MISO, and MOSI, as well as four chip selects,
SS0# to SS3#, and an interrupt input, SINT#.
The +5V power provided to pins 1 and 14 of J27 is protected by a 1 Amp resettable fuse.
Table 21: SPX Expansion Bus Pinout
J27
Pin
Signal
Name
Function
1
V5_0
+5V (Protected)
2
SCLK
Serial Clock
3
GND
Ground
4
MISO
Serial Data In
5
GND
Ground
6
MOSI
Serial Data Out
7
GND
Ground
8
SS0#
Chip Select 0
9
SS1#
Chip Select 1
10
SS2#
Chip Select 2
11
SS3#
Chip Select 3
12
GND
Ground
13
SINT#
Interrupt Input
14
V5_0
+5V (Protected)
SPI is, in its simplest form, a three wire serial bus. One signal is a Clock, driven only by the
permanent Master device on-board. The others are Data In and Data Out with respect to the
Master. The SPX implementation adds additional features, such as chip selects and an interrupt
input to the Master. The Master device initiates all SPI transactions. A slave device responds
when its Chip Select is asserted and it receives Clock pulses from the Master.
The SPI clock rate can be software configured to operate at speeds between 1 MHz and 8 MHz.
Please note that since this clock is divided from a 33 MHz PCI clock, the actual generated
frequencies are not discrete integer MHz frequencies. All four common SPI modes are supported
through the use of clock polarity and clock idle state controls.
This SPX interface is also used as a manufacturing test interface to output data from the internal
LPC bus (primarily for I/O Port 80 codes). When there is no SPX module installed, there will be
signal activity on this SPX connector (for example, the 33 MHz LPC clock will be on the SCLK
pin 2). This mode can be disabled by grounding pin 5 on J27, and the interface will function
normally as an SPX interface. It can also be permanently disabled by adding stuffing resistors on
the board.
