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Physical Details

EBX-22 Reference Manual

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Jumper Blocks

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UMPERS

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HIPPED

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ONFIGURATION

Figure 12. Jumper Block Locations

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Summary of Contents for EBX-22

Page 1: ...Reference Manual DOC REV 3 19 2009 EBX 22 Sidewinder VIA Eden Based SBC with Ethernet Video Audio SATA Industrial I O and SPI S t o c k C h e c k c o m...

Page 2: ...VersaLogic makes no representations or warranties with respect to this product and specifically disclaims any implied warranties of merchantability or fitness for any particular purpose VersaLogic re...

Page 3: ...sidewindersupport asp contains additional information and resources for this product including Reference Manual PDF format Operating system information and software drivers Data sheets and manufacture...

Page 4: ...ting System Installation 16 Physical Details 17 Dimensions and Mounting 17 Hardware Assembly 20 Standoff Locations 20 External Connectors 21 EBX 22 Connectors 21 EBX 22 Connector Functions and Interfa...

Page 5: ...Disk 38 PS 2 Keyboard and Mouse 39 USB 40 BIOS Configuration 40 USB Solid State Drive Connector 40 CompactFlash 41 Installing an Operating System on CompactFlash 41 Programmable LED 42 External Speake...

Page 6: ...ctions 61 SPI Legacy Mode 62 SPI Bit Bang Mode 65 PWM Outputs and TACH Inputs 66 External Connections 66 PWM Output and Tach Input Code Example 66 PC 104 Expansion Bus 69 PC 104 I O Support 69 PC 104...

Page 7: ...onnector Analog video supports SVGA and YPbPr component PC 104 Plus expansion site Two SATA I channels IDE controller one channel ATA 100 compatible Five USB 2 0 1 1 ports TVS devices on user I O conn...

Page 8: ...of low power 533 MHz PC2 4200 compatible DDR2 RAM is available The EBX 22 offers a wide range of video and graphics capabilities including a 2D 3D UniChrome Pro II graphics processor high definition M...

Page 9: ...ce Two Intel 82551ER based fast Ethernet 10BaseT 100BaseTX controllers Audio Interface HD audio codec one Line Out and one Line In support COM1 2 Interface RS 232 16C550 compatible 115k baud max COM3...

Page 10: ...Flat Panel Audio Codec 10 100 Ethernet 2 PLD Legacy I O Industrial I O LPC Super I O Digital I O 16 31 Analog Input SPX Interface PC 104 Plus PCI USB 4 COM 1 2 RS 232 COM 3 4 RS 232 422 485 LPT Floppy...

Page 11: ...ean Union EU beginning July 1 2006 VersaLogic Corporation is committed to supporting customers with high quality products and services meeting the European Union s RoHS directive LVDS DVI Transmitter...

Page 12: ...ge Note The exterior coating on some metallic antistatic bags is sufficiently conductive to cause excessive battery drain if the bag comes in contact with the bottom side of the EBX 22 LITHIUM BATTERY...

Page 13: ...any questions arise Quantity of items being returned The model and serial number barcode of each item A detailed description of the problem Steps you have taken to resolve or recreate the problem The...

Page 14: ...BR 1201 SATA data cable CBR 0701 ATX to SATA power adapter cable CBR 0401 Power adapter cable CBR 2022 You will also need a Windows or other OS installation CD Basic Setup The following steps outline...

Page 15: ...7 Attach the video monitor interface cable to the video adapter Plug the USB CD ROM drive keyboard and mouse into on board USB sockets J3 J4 J9 or J11 Plug the SATA data cable CBR 0701 into socket J8...

Page 16: ...tomatically when power is applied If a jumper is installed at V5 3 4 you will have to create a pulse on pin 40 of I O connector J14 This can be done by shorting pin 40 to ground for 100 to 500 ms 5 Re...

Page 17: ...OS and year Use digits BIOS Core Version EB SF 003 and BKSP to change VersaLogic Version 6 3 102 field BIOS Build Date 03 19 08 System BIOS Size 128KB CPM CSPM BPM Modules P7C7 CX700 EBX22 StrongFrame...

Page 18: ...ype Autoconfig IDE 3 Mode UDMA mode 40 conductor cable VT8237 ATA Controller Configuration PATA Controller Compatible Mode SATA Controller Native Mode POST Tab Main Exit Boot POST SIO Features Firmbas...

Page 19: ...in Exit Boot POST SIO Features Firmbase Misc Board BIOS Feature Configuration Enable to initialize APICs and use them in Interrupt Processing Use APIC an emulated PIC mode Quick Boot Enabled If you wi...

Page 20: ...on Serial Port None Quiet Mode Disabled Strict Mode Enabled Bypass Mode Enabled TCB Security Enabled Statistics Enabled Clear Memory Disabled Use TSC Enabled Timer Optimization Disabled Debug Yields D...

Page 21: ...e IRQ enable Disabled Overtemp IRQ enable Disabled CPU overtemp threshold C 95 Board overtemp threshold C 60 Voltage or Temperature IRQ None Chipset Tab Boot POST SIO Features Firmbase Misc Board Chip...

Page 22: ...s for a particular operating system or a link to the drivers are available at the EBX 22 Product Support web page at http www versalogic com private Sidewindersupport asp Note An operating system inst...

Page 23: ...provide for specific mounting hole and PC 104 Plus stack locations as shown in the diagram below Figure 4 EBX 22 Dimensions and Mounting Holes Not to scale All dimensions in inches 3 0 20 0 00 0 20 1...

Page 24: ...d demated Flex damage caused by excessive force on an improperly mounted circuit board is not covered under the product warranty Figure 5 EBX 22 Height Dimensions Not to scale All dimensions in inches...

Page 25: ...EBX 22 Reference Manual 19 Figure 7 CBR 4004 Dimensions and Mounting Holes Not to scale All dimensions in inches J1 J2 J3 J4 J6 J7 J8 J9 J5 2 38 2 87 0 25 0 25 0 40 1 95 0 70 0 63 0 62 0 06 S t o c k...

Page 26: ...e secured with four male female standoffs C threaded from the top side which also serve as mounting struts for the PC 104 stack The entire assembly can sit on a table top or be secured to a base plate...

Page 27: ...17 PC 104 Plus PCI J26 27 PC 104 ISA J20 CompactFlash CPU Battery J7 SVGA J19 LVDS V1 J25 SPI J22 IDE J15 Analog PWM Digital I O J23 Audio Digital I O USB 4 J29 LPT Pin 1 J14 COM 1 4 PLED PS 2 Keyboar...

Page 28: ...USB Solid State Drive Intel Z U130 SSD 2mm socket _ _ 40 J14 COM 1 4 PLED PS 2 Keyboard and Mouse Reset Button Speaker External Wake FCI 89361 350LF CBR 5009A 18 2mm 50 pin to 50 pin IDC to breakout...

Page 29: ...ip 10250 4 5 pin screw terminal J3 COM1 COM2 Kycon K42 E9P P A4N Dual stacked DB 9 male J4 PS 2 Keyboard and Mouse Kycon KMDG 6S 6S S4N Dual stacked PS 2 female J5 COM4 Conta Clip 10250 4 5 pin screw...

Page 30: ...igure 11 CBR 4004 Connectors CBR 4004 connector functions depend on the I O connector to which it is attached J15 or J23 See Table 6 J15 or Table 7 J23 for details 2 1 40 39 J1 J2 J3 J4 J6 J7 J8 J9 5...

Page 31: ...ls EBX 22 Reference Manual 25 Jumper Blocks JUMPERS AS SHIPPED CONFIGURATION Figure 12 Jumper Block Locations V4 V3 V2 V1 1 1 2 2 1 3 5 7 2 4 6 8 V3 V6 V1 V6 V5 1 2 3 V5 3 2 1 V4 1 2 3 V2 S t o c k C...

Page 32: ...to power up Installing a jumper on pins 1 2 causes the EBX 22 to create its own soft power pulse automatically when power is applied See page 10 for details 1 2 In Generated V6 1 2 CompactFlash Master...

Page 33: ...wer Input 10 GND Ground Note The 3 3VDC 12VDC and 12VDC inputs on the main power connector are only required for PC 104 Plus and PC 104 expansion modules that require these voltages POWER REQUIREMENTS...

Page 34: ...ement part number HB3 0 1 The life expectancy under normal use is approximately 10 years VOLTAGE ALERT INTERRUPT The EBX 22 can be configured to generate an interrupt if the 5V power rail exceeds 5 25...

Page 35: ...jumper to back to V1 1 2 4 Power on the EBX 22 CMOS Setup Defaults The EBX 22 permits users to modify not only the CMOS settings but the defaults as well This allows the system to boot up with user d...

Page 36: ...named CMOS BIN is created and saved to the floppy 5 Select the FBU option Load Custom CMOS defaults A directory of the floppy is displayed 6 Select the CMOS BIN file and press the P key to program th...

Page 37: ...Ready 26 J5 1 Ground Ground 3 Top DB9 2 Receive Data 27 5 RTS TxD 4 7 Request to Send 28 4 TXD TxD 5 3 Transmit Data 29 Ground Ground 6 8 Clear to Send 30 2 RXD RxD 7 4 Data Terminal Ready 31 3 CTS R...

Page 38: ...ND 1 GND1 11 Digital I O 0 J3 5 IO9 12 Digital I O 1 Digital IO 4 IO10 13 Digital I O 2 3 IO11 14 Digital I O 3 2 IO12 15 GND 1 GND2 16 Digital I O 4 J4 5 IO13 17 Digital I O 5 Digital IO 4 IO14 18 Di...

Page 39: ...J3 5 IO9 12 Digital I O 17 Digital IO 4 IO10 13 Digital I O 18 3 IO11 14 Digital I O 19 2 IO12 15 GND 1 GND2 16 Digital I O 20 J4 5 IO13 17 Digital I O 21 Digital IO 4 IO14 18 Digital I O 22 3 IO15 19...

Page 40: ...I O write 2 Ground Ground 24 Ground Ground 3 DD7 Data bus bit 7 25 DIOR I O read 4 DD8 Data bus bit 8 26 Ground Ground 5 DD6 Data bus bit 6 27 IORDY I O ready 6 DD9 Data bus bit 9 28 Ground Ground 7 D...

Page 41: ...power supply you are using does not provide SATA connectors adapters are available Table 9 SATA Port Pinout J8 or J10 Pin Signal Name Function 1 GND Ground 2 TX Transmit 3 TX Transmit 4 GND Ground 5 R...

Page 42: ...ould be enabled for RS 422 and the RS 485 endpoint station It should be disabled for RS 232 and the RS 485 intermediate station If RS 485 mode is used the differential twisted pair TxD RxD and TxD RxD...

Page 43: ...e connectors use IEC 61000 4 2 rated TVS components to help protect against ESD damage Table 10 COM1 2 Pinout CBR 5009 Connector J3 COM1 COM2 Top DB9 J3 Pin Bottom DB9 J3 Pin RS 232 1 10 DCD 2 11 RXD...

Page 44: ...29 Pin Centronics Signal Signal Direction 1 Strobe Out 2 Auto feed Out 3 Data bit 0 In Out 4 Printer error In 5 Data bit 1 In Out 6 Reset Out 7 Data bit 2 In Out 8 Select input Out 9 Data bit 3 In Out...

Page 45: ...and mouse is protected by a 1 Amp fuse This connector uses IEC 61000 4 2 rated TVS components to help protect against ESD damage Table 13 PS 2 Mouse and Keyboard Pinout CBR 5009 J4 Top Pin Signal Des...

Page 46: ...ON Three USB 1 1 controllers UHCI use PCI interrupt INTA INTB and INTC One USB 2 0 EHCI controller uses PCI interrupt INTD CMOS Setup is used to select the IRQ line routed to each PCI interrupt line U...

Page 47: ...3500 Silicon Systems 512 MB SSD C51M 3012 Silicon Systems 512 MB SSD C51MI 3012 Silicon Systems 512 MB SSD C51M 3500 Silicon Systems 512 MB SSD C51MI 3500 Silicon Systems 1 GB SSD C01G 3012 Silicon S...

Page 48: ...Refer to page 69 for further information LED On LED Off MOV DX 1D0H MOV DX 1D0H IN AL DX IN AL DX OR AL 80H AND AL 7FH OUT DX AL OUT DX AL Note The LED is turned on by the BIOS during system startup...

Page 49: ...g the primary video BIOS screen resolutions of up to 1600 x 1200 at 32 bits are available These maximums may be reduced if both outputs are enabled Using the secondary video BIOS enables the LVDS outp...

Page 50: ...e panel you are attempting to use contact Support VersaLogic com for a custom video BIOS The 3 3V power provided to pins 19 and 20 of J19 is protected by a 1 Amp fuse See the connector location diagra...

Page 51: ...0 18 bit LVDS TFT HIGH DEFINITION MULTIMEDIA INTERFACE The EBX 22 incorporates a High Definition Multimedia Interface HDMI that supports most PC video formats including standard enhanced or high defin...

Page 52: ...to any COM port Notes on console redirection When console redirection is enabled you can access CMOS Setup by pressing and holding down Ctrl C The decision to redirect the console is made early in BI...

Page 53: ...CMOS Setup Ethernet interface 0 J12 uses PCI interrupt INTC CMOS Setup is used to select the IRQ line routed to each PCI interrupt line Ethernet interface 1 J5 uses PCI interrupt INTD STATUS LED Each...

Page 54: ...cuit can be used to detect over temperature conditions which can result from heat sink failure or excessive ambient temperatures The EBX 22 can be configured to generate an interrupt when the temperat...

Page 55: ...ine In Right 39 4 AUDINL Line In Left 40 5 GND Ground J23 Pin CBR 4004 J8 Pin Signal Name Function 32 2 AUDOUTR Line Out Right 34 4 AUDOUTL Line Out Left 35 5 GND Ground Watchdog Timer A watchdog time...

Page 56: ...T Register Bit Assignments Bit Mnemonic Description D7 ENABLE Watchdog Enable Enables and disables the watchdog timer reset circuit 0 Disabled 1 Enabled D6 D0 EXP Expiration Time These bits define the...

Page 57: ...constantly scans the analog chip for inputs Warning Application of analog voltages greater than 4 395V can physically damage the converter EXTERNAL CONNECTIONS Single ended analog voltages are applie...

Page 58: ...e 4 095V 0FFFh 4095 Maximum voltage 2 048V 0800h 2048 Half scale 1 024V 0400h 1024 Quarter scale 0 001V 0001h 1 1 LSB 0 000000 0000h 0 Zero ground input ADC STATE MACHINE Data Registers The EBX 22 ADC...

Page 59: ...D15 D14 D13 D12 D11 D10 D9 D8 AD11 AD10 AD9 AD8 D7 D6 D5 D4 D3 D2 D1 D0 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 The ADCx register is a 16 bit read register containing 12 bits of data from A D conversion resul...

Page 60: ...rst analog conversion after power up or reset returns the data from ADCH0 The second conversion returns the conversion data from the channel addressed in the first conversion Each successive conversio...

Page 61: ...banging of the ADC To use this register ADC field bits D1 D0 of the MODCON register 1DFh must be set to 0h see Table 44 for mode control settings ADCBB Read Write 1D5h D7 D6 D5 D4 D3 D2 D1 D0 ADCIN R...

Page 62: ...ction input polarity and interrupt source Digital I O Interrupt Generation Using the SPI Interface The EBX 22 digital I O can be configured to issue hardware interrupts on the transition high to low o...

Page 63: ...ode 00 24bit DIO_0_SS OUT DX AL MOV DX 1D9h MOV AL 30h SPISTATUS 8MHz no IRQ left shift OUT DX AL MOV DX 1DBh MOV AL 44h SPIDATA1 mirror and open drain interrupts OUT DX AL MOV DX 1DCh MOV AL 0Ah SPID...

Page 64: ...ode Automatic D2 SS2 1 SPI Slave Select On Board DIO 0 15 D1 SS1 1 D0 SS0 0 OUT SPICONTROL1 H26 EPM 22 SPICONTROL2 Register D7 IRQSEL1 0 IRQ Select IRQ3 D6 IRQSEL0 0 D5 SPICLK1 1 SPI SCLK Frequency 8...

Page 65: ...LE INP SPISTATUS AND H1 H1 WEND Repeat until ESC key is pressed WHILE INKEY CHR 27 READ DIO INPUT DATA FROM MCP23S17 MCP23S17 GPIOA Register Address OUT SPIDATA2 H12 MCP23S17 SPI Control Byte Read OUT...

Page 66: ...is bit is read only D6 DIOINT Digital I O Interrupt This bit is read only D5 D4 Reserved These bits have no function D3 DIOCLK Digital I O Clock This bit is read write D2 DIOOUT Digital I O Output Thi...

Page 67: ...s from the Master The SPI clock rate can be software configured to operate at speeds between 1 MHz and 8 MHz Please note that since this clock is divided from a 33 MHz PCI clock the actual generated f...

Page 68: ...e select modes SPILEN1 SPILEN0 Frame Length 0 0 8 bit 0 1 16 bit 1 0 24 bit 1 1 32 bit D3 MAN_SS SPI Manual Slave Select Mode This bit determines whether the slave select lines are controlled through...

Page 69: ...Enable Enables or disables the use of the selected IRQ IRQSEL by an SPI device 0 SPI IRQ disabled default 1 SPI IRQ enabled Note The selected IRQ is shared with PC 104 ISA bus devices CMOS settings mu...

Page 70: ...ck and if the MAN_SS bit 0 will also assert a slave select to begin an SPI bus transaction Increasing frame sizes from 8 bit use the lowest address for the least significant byte of the SPI data word...

Page 71: ...0h see Table 44 for mode control settings SPIBB Read Write 1D7h D7 D6 D5 D4 D3 D2 D1 D0 SPI_IN SPI_INT SPI_CLK SPI_OUT SPI_CS3 SPI_CS2 SPI_CS1 SPI_CS0 Table 33 SPIBB Bit Assignments Bit Mnemonic Descr...

Page 72: ...inues counting until the last edge is detected If the counter overflows before the number of edges is detected it sets the count to FFFFh If no edges are detected a stalled fan event occurs and the co...

Page 73: ...ther than default of 80h OUT DX AL MOV DX C70h MOV AL 69h Zone 3 Low Temp Limit Register OUT DX AL MOV DX C71h MOV AL 81h Any value other than default of 80h OUT DX AL Set PWM current duty cycle optio...

Page 74: ...X Read Current Value OR AL 1h Enable Start bit OUT DX AL Reading FanTachs Read FanTach LSB first then read the latched MSB fantach 1 LSB 28h fantach 1 MSB 29h fantach 2 LSB 2Ah fantach 2 MSB 2Bh fanta...

Page 75: ...8h 3FFh Available base I O addresses for COM ports are 220h 228h 238h 338h 3F8h 2F8h 3E8h and 2E8h PC 104 MEMORY SUPPORT Memory ranges supported D0000h DFFFFh 8 and 16 bit transfers IRQ SUPPORT The fo...

Page 76: ...36 I O Map I O Device Standard I O Addresses Reserved 1B0h 1BFh ADC Data Registers 1C0h 1CFh PLED and Product ID Register 1D0h Revision and Type Register 1D1h Video BIOS Select Register 1D2h Reserved...

Page 77: ...on the main board COM ports can share interrupts with other COM ports but not with other devices Table 37 EBX 22 IRQ Settings z default setting allowed setting IRQ Source 0 1 2 3 4 5 6 7 8 9 10 11 12...

Page 78: ...ble 39 PRODID Register Bit Assignments Bit Mnemonic Description D7 PLED Light Emitting Diode Controls the programmable LED on connector J4 0 Turns LED off 1 Turns LED on D6 D0 ID Product ID These bits...

Page 79: ...Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 PLD Revision Level 0 0 0 0 1 2 01 0 0 0 1 0 3 00 These bits are read only D2 EXTEMP Extended Temperature This bit indicates whether the EBX 22 is an extended temperature...

Page 80: ...es the status of jumper V6 3 4 0 Jumper in Primary Video BIOS selected 1 Jumper out Secondary Video BIOS selected This bit is read only D0 Reserved This bit has no function General Purpose Output Regi...

Page 81: ...I O range for COM1 is forwarded to ISA bus for use by expansion cards D5 COM4 COM4 I O 0 I O range for COM4 is used for on board UART 1 I O range for COM4 is forwarded to ISA bus for use by expansion...

Page 82: ...rface using registers 1D8h 1DDh reset default 1 0 Reserved do not use 1 1 Reserved do not use D4 D3 DIO DIO Mode Control These bits set the mode of the digital I O function D4 D3 Mode 0 0 Use register...

Page 83: ...oller Intel Corporation Intel 82551ER PC 104 Specification PC 104 Consortium PC 104 Resource Guide PC 104 Plus Specification VersaLogic Corporation PC 104 Resource Guide General PC Documentation Micro...

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