VAR-320SBC Reference Guide
Copyright © 2008 Variscite
25
Static Memory interface (Compact Flash, Nand flash, host-bus, SRAM, VLIO)
Features:
•
Connection to the DFI.
•
Interface to SRAM-like devices, Variable Latency I/O (VLIO) devices, various types of XIP
flash (including synchronous and asynchronous), and Compact Flash.
•
NAND flash devices with NOR flash interfaces on the DFI. Read burst and write burst
capabilities
•
Support synchronous flash, asynchronous flash, SRAM, VLIO, and synchronous read/write
flash-type companion chips on DFI.
Signal
Pin
number
Type Description
GPIO
DF_IO_0 P2-93
I/O
Data
bus
n/a
DF_IO_1 P2-95
I/O
Data
bus
n/a
DF_IO_2 P2-97
I/O
Data
bus
n/a
DF_IO_3 P2-99
I/O
Data
bus
n/a
DF_IO_4 P2-101
I/O
Data
bus
n/a
DF_IO_5 P2-105
I/O
Data
bus
n/a
DF_IO_6 P2-107
I/O
Data
bus
n/a
DF_IO_7 P2-109
I/O
Data
bus
n/a
DF_IO_8 P2-111
I/O
Data
bus
n/a
DF_IO_9 P2-113
I/O
Data
bus
n/a
DF_IO_10 P2-117
I/O
Data
bus
n/a
DF_IO_11 P2-119
I/O
Data
bus
n/a
DF_IO_12 P2-121
I/O
Data
bus
n/a
DF_IO_13 P2-123
I/O
Data
bus
n/a
DF_IO_14 P2-125
I/O
Data
bus
n/a
DF_IO_15 P2-129
I/O
Data
bus
n/a
DF_BA_0
P2-57
O
DFI bus address 0
n/a
DF_BA_1
P2-59
O
DFI bus address 1
n/a
DF_BA_2
P2-61
O
DFI bus address 2
n/a
DF_BA_3
P2-63
O
DFI bus address 3
n/a
DF_ALE_NWE P2-53 O
Output write enable for static memory, muxed with DF
ALE signal
n/a
DF_CLE_NOE P2-51 O
Output enable for static memory, muxed with DF CLE
signal.
n/a
nCS_2 P2-98
O
Chip select for static memory on the data flash
interface.
3
nXCVREN P2-49
O
External
transceiver enable, Data flash interface
n/a
BE0_N P2-72
O
Data byte enable.
BE0_N corresponds to DF_IO<7:0>
n/a
