AMY-5M - Hardware Integration Manual
GPS.G5-MS5-08207-A3
Preliminary
Design-in
Page 11 of 54
the RF section requires 1.8 V but external memory requires 2.7 V, it is advisable to monitor VDD_IO rather than
VDD_RF.
The threshold at V_RESET for releasing the MR_N master reset signal can be configured using the V_TH pin. It
can be set to either 2.5 V or 1.8 V. If V_TH is open, the threshold is set to 1.8 V, if this pin is connected to GND
the threshold is at 2.5 V.
Internally, VDD_B and VDD_C are supervised by power-on reset circuits. Reset signals on backup and core
domains are only released once the respective supply voltages fall within the operational conditions.
An additional monitor switches the supply of the back-up region VDD_B from VDD_IO to V_BCKP, once VDD_IO
falls below its operational specification. Thus, a separate supply source can be used to maintain RTC and backup
RAM information even if VDD_IO fails. If this feature is not needed, V_BCKP must be connected to GND.
2.1.1.7
USB interface power supply
VDD_USB supplies the I/Os of the USB interface. If the USB interface is not used, the VDD_USB pin must be
connected to GND.
If the application uses USB, the correct USB power mode needs to be configured (bus-powered or self
powered). See the
u-blox 5 Receiver Description including Protocol Specification
2.1.2
Power management configuration
Depending on the application, the power supply schematic will differ. Some examples are shown in the
following sections:
Supply voltage nominal 3.3 V (2.5 – 3.6 V)
see section 2.1.5
Supply voltage nominal 1.8 V (1.75 – 2.0 V)
see section 2.1.6
Direct supply of core voltages (VDD_RF, VDD_3V 1.8 V, V_DCDC 1.4 V)
see section 2.1.7
Dual power supply using 3.0V and 1.4V (VDD_3V 3.0 V, V_DCDC 1.4 V)
see section 2.1.8
2.1.3
System power consumption
the total system power disipation p can be calculated using Equation 1:
P = (V
RF
I
RF
) + (V_DCDC
I
DCDC
)
Equation 1: Calculation of system power dissipation
From this equation it is clear that a 1.4 V and 1.8 V dual supply provides the optimum solution in terms of power
efficiency. The corresponding application circuit is shown in section 2.1.7. In case distinct 1.4 V and 1.8 V supply
voltages are not available in the system, the single 1.8 V supply provides the best trade-off between circuit
complexity and power efficiency. This scenario is described in section 2.1.6.
At single 3.3 V supply voltage the use of a DC/DC converter may increase power efficiency only marginally, i.e.
by about 22% for continuous tracking operation. The optimum power-efficiency is achieved if the DC/DC
converter is only used to generate the 1.4 V core voltage and the RF-IC supply voltage is generated using the
built-in LDO. If power-efficiency is key for the application, use of an ultra-high efficiency external DC/DC
converter such as Linear Technology’s LTC3410 is recommend. This particular device also reduces the footprint
needed for the DC/DC converter by integrating all active components into a 2.8 × 18 mm
2
package. In section
2.1.7 and 2.1.8 the applicable power-supply circuitry for the baseband-IC is shown for the case if no DC/DC
converter is used. For supply voltages higher than 3.6 V, the use of an external regulator, preferably a DC/DC
converter, is mandatory. But again, this solution does not provide the utmost power-efficiency.
