AMY-5M - Hardware Integration Manual
GPS.G5-MS5-08207-A3
Preliminary
Design-in
Page 31 of 54
Standard Function
Remarks
No
Name
I/O
Description
G3
PIO3 / SCL2
I/O
DDC for peripherals
Leave open if not used.
G4
PIO2 / SDA2
I/O
DDC for peripherals
Leave open if not used.
G5
PIO5 / TxD1
I/O
Asynchronous Serial
Leave open if not used.
G6
PIO4 / RxD1
I
Asynchronous Serial
Pull-up resistor of 100k to VDD_IO.
G7
V_BCKP
I
Backup voltage supply
1.4-3.6V (optional). Connect to GND if not
used
G8
VDD_C
O
Core Power
Supply capacitor, required 2.2 F
G9
NC
O
Not Connected
Table 6: Pinout AMY-5M
2.8
Layout design-in checklist
Follow this checklist for the layout design to get an optimal GPS performance.
Layout optimizations (
Section 2.9
Is the GPS module placed according to the recommendation in
Section 2.9.3
Is the Grounding concept optimal?
Has the micro strip been kept as short as possible?
Assure low serial resistance in V_DCDC power supply line (choose a line width >400um)
Keep power supply line as short as possible
Design a guard ring around the optional RTC crystal
Add a ground plane underneath the GPS module to reduce interference.
For improved shielding, add as many vias as possible around the micro strip, around the serial
communication lines, underneath the GPS module etc.
Calculation of the micro strip for RF input
The micro strip must be 50 Ohms and be routed in a section of the PCB where minimal interference from
noise sources can be expected.
In case of a multi-layer PCB, use the thickness of the dielectric between the signal and the 1st
GND
layer
(typically the 2nd layer) for the micro strip calculation.
If the distance between the micro strip and the adjacent
GND
area (on the same layer) does not exceed 5
times the track width of the micro strip, use the “Coplanar Waveguide” model in AppCad to calculate the
micro strip and not the “micro strip” model.