AMY-5M - Hardware Integration Manual
GPS.G5-MS5-08207-A3
Preliminary
Design-in
Page 33 of 54
2.9.3
Placement
A very important factor in achieving maximum GPS performance is the placement of the receiver on the PCB.
The connection to the antenna must be as short as possible to avoid jamming into the very sensitive RF section.
Make sure that RF critical circuits are clearly separated from any other digital circuits on the system board. To
achieve this, position the receiver digital part towards your digital section of the system PCB. Care must also be
exercised with placing the receiver in proximity to circuitry that can emit heat. The RF part of the receiver is very
sensitive to temperature and sudden changes can have an adverse impact on performance.
AMY-5M receivers are temperature sensitive devices. Avoid high temperature drift and air vents
near the receiver.
2.10
Migration considerations
With future u-blox GPS platforms PIO 4,7,8 (RX1, EXTINT0, EXTINT1) will belong to the VDD_IO domain as will
all the other PIOs. For forward compatibility, PIO 4,7,8
must
be pulled up with a 100 kOhms pull-up resistor to
VDD_IO. The following recommendations also need to be considered for forward compatible designs:
PIO 4,7,8 will have internal pull up to VDD_IO in future designs. External pull up resistors can be removed.
In future designs VDD_IO must be available to generate a wake-up event (this is a requirement with current
AMY designs as well).
In future designs leave PIO pins open if not used. Otherwise only connect PIO pins to VDD_IO compatible
levels (<0.3 x VDD_IO for low and >0.7 x VDD_IO for high); don’t connect any PIO pins to VDD_B.
No connection other then the recommended capacitors shall be made to any of VDD_B or VDD_C pins.
For Forward compatibility with current designs, do not connect PIO 4, PIO 7,
or PIO 8 to VDD_B or GND.
