68
Chapter 6
Code (hex)
Name
Description
9
Early Cache Initialization
Initializes Cyrix CPU, and cache.
A
Setup Interrupt Vector Table
Initializes first 120 interrupt vectors with SPURIOUS_INT_HDLR and
initializes INT 00h-1Fh according to INT_TBL.
B
T
est CMOS RAM Checksum
T
ests CMOS RAM Checksum. If it is bad, or the <Insert> key is pressed,
loads defaults.
C
Initialize Keyboard
Detects the type of keyboard controller (optional). Sets NUM_LOCK status.
D
Initialize Video Interface
Detects CPU clock. Reads CMOS location 14h to find out what type of video
is in use. Detects and initializes video adapter.
E
T
est Video Memory
T
ests video memory. Writes sign-on message to screen. Enables shadow
according to Setup.
F
T
est DMA Controller 0
T
ests BIOS checksum. Detects and initializes keyboard.
10
T
est DMA Controller 1
T
ests DMA Controller 1.
11
T
est DMA Page Registers
T
ests DMA Page Registers.
12-13
Reserved
-
14
T
est Timer Counter 2
T
ests 8254 Timer 0 Counter 2.
15
T
est 8259-1 Mask Bits
Verifies 8259 Channel 1 masked interrupts by alternately turning off and on
the
interrupt lines.
16
T
est 8259-2 Mask Bits
Verifies 8259 Channel 2 masked interrupts by alternately turning off and on
the
interrupt lines.
17
T
est Stuck 8259
’
s Interrupt
Turns off interrupts to verify that no interrupt mask register is on.
Bits
18
T
est 8259 Interrupt
Forces an interrupt and verifies that the interrupt occurred.
Functionality
19
T
est Stuck NMI Bits
Verifies that NMI can be cleared.
(Parity, I/O Check)
1A
-
Displays the CPU clock.
