Transition Networks
SDSTX3110-121S-LRT User Guide
33745 Rev. A
https://www.transition.com
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53
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109
Label
Description
asserted or unasserted to obtain an odd number of mark bits.
Even
: the number of mark bits in the data is counted, and the parity bit is
asserted or unasserted to obtain an even number of mark bits.
Mark
: the parity bit is always set to the mark signal condition (logical 1).
Space
: the last transmitted data bit will always be a logical 0
Flow Control
Serial communication consists of hardware flow control and software flow
control, so called as the control is handled by software or hardware.
XOFF and XON is software flow control while RTS/CTS or DTR/DSR is
hardware flow control.
Choose
XOFF
to tell the computer to stop sending data; then
the receiving side will send an XOFF character over its Tx line
to tell the transmitting side to stop transmitting.
Choose
XON
to tell the computer to begin sending data again; then the
receiving side will send an XON character over its Tx line to tell
the transmitting side to resume transmitting. In hardware flow control mode,
when the device is ready to receive data, it sends a CTS (Clear To Send) signal
to the device on the other end.
When a device has something it wants to send, it will send a RTS (Ready To
Send) signal and waits for a CTS signal to come back its way. These signals
are sent apart from the data itself on separate wires.
Force TX Interval Time
Force TX interval time is to specify the timeout when no data has been
transmitted. When the timeout is reached or TX buffer is full (4K Bytes), the
queued data will be sent.
0
means disable. Factory default value is
0
.
Performance
Throughput
: This mode optimized for highest transmission speed.
Latency
: This mode optimized for shortest response time.
Click the
Apply
button when done to apply the changes.
