Topway LMT070DICFWD-NJN, User Manual

Page: 8 / 34

TOPWAY
LCD Module User Manual
LMT070DICFWD-NJN
URL: www.topwaydisplay.com Document Name: LMT070DICFWD-NJN-Manual-Rev0.2.DOC
Page: 8 of 33
7. Commands
REG[01h] Power and Display Control Register (PWRR)
Bit Description Default Access
7
LCD Display Off
0:display off.
1:display on.
0 RW
6-2 NA 0 RO
1
Sleep Mode
0:Normal mode.
1:Sleep mode.
Note:
1.There are 3 ways to wake up from sleep mode:
Touch Panel wake up,Key Scan wake up,Software wake up.
2. When using IIC, this function is not supported.
3. When using SPI, it has its particular steps to use this
function, refer to section 6-1-2-3 please. 0 RW
0
Software Reset
0 : No action.
1 : Software Reset.
Note: The bit must be set to 1 and then set to 0 to complete
a software reset
0 WO
REG[02h] Memory Read/Write Command (MRWC)
Bit Description Default Access
7-0
Write Function : Memory Write Data
Data to write in memory corresponding to the setting of
MWCR1[3:2].Continuous data write cycle can be accepted in
bulk data write case.
Read Function : Memory Read Data
Data to read from memory corresponding to the setting of
MWCR1[3:2]. Continuous data read cycle can be accepted in
bulk data read case. Note that the first data read cycle is
dummy read and need to be ignored.
-- RW
REG[04h] Pixel Clock Setting Register (PCSR)
Bit Description Default Access
7
PCLK Inversion
0 : PDAT is fetched at PCLK rising edge.
1 : PDAT is fetched at PCLK falling edge. 0 RW
6-2 NA 0 RO
1-0
PCLK Period Setting
pixel clock (PCLK) period setting.
00b: PCLK period = System Clock period.
01b: PCLK period = 2 times of System Clock period.
10b: PCLK period = 4 times of System Clock period.
11b: PCLK period = 8 times of System Clock period.
0 RW