PC
+ 5 V
+ 6 V
USB
USB
J5
J12
J14
J18
TSW1400
J4
J13
U
SB
Mi
n
i-
B
C
a
b
le
Spectrum
Analyzer
Optional Signal
Generator
(CLK Source)
J11 or J12
Signal
Generator
(LO Source)
U
SB
Mi
n
i-
B
C
a
b
le
External clock source is needed if LMK04800
is configured as the following:
x
Clock Distribution Mode ( Source to J12)
x
Dual PLL Mode (Source to J12)
x
Single PLL Mode (Source to J11)
See Optional Configuration Section for detail.
EVM includes additional RF signal path configurations such as:
x
3dB splitter for LO source
x
Additional RF amp and attenuator path
See Optional Configuration Section for detail.
RF
J9
LO
J22
RF
J7
LO
J19
TX_AB
TX_CD
Basic Test Procedure with TSW1400
17
SLAU374B – December 2011 – Revised May 2016
Copyright © 2011–2016, Texas Instruments Incorporated
TSW308x Evaluation Module
3
Basic Test Procedure with TSW1400
This section outlines the basic test procedure for testing the EVM with the TSW1400.
3.1
TSW1400 Overview
The TSW1400 is a high speed data capture and pattern generator board. When functioning as a pattern
generator, it has a maximum LVDS bus rate of 1.5 GSPS, and this allows evaluation of the DAC348x and
also DAC34SH84 with maximum 750 MSPS of input data rate per channel.
See the TSW1400 user’s guide (
) for more detailed explanation of the TSW1400 setup and
operation. This document assumes that the High Speed Data Converter Pro software (
) is
installed and functioning properly.
3.2
Test Block Diagram for TSW1400
The test set-up for general testing of the TSW3084/TSW30H84EVM with the TSW1400 pattern generator
card is shown in
Figure 12. TSW1400 and TSW3084/TSW30H84 Test Setup Block Diagram
The test setup for general testing of the TSW3085 with the TSW1400 pattern generator is shown in
