Software Control
8
SLAU374B – December 2011 – Revised May 2016
Copyright © 2011–2016, Texas Instruments Incorporated
TSW308x Evaluation Module
2.2.1
Input Tab Control Options
Figure 4. Input Tab Control Options – DAC348x
•
FIFO: allows the configuration of the FIFO and FIFO synchronization (sync) sources.
•
LVDS delay: provides internal delay of either the LVDS DATA or LVDS DATACLK to help meet the
input setup/hold time.
•
Data Routing: provides flexible routing of the A, B, C, and D sample input data to the appropriate
digital path.
Note:
the DAC3482 does not support this mode.
•
SIF Control: provides control of the Serial Interface (3-wire or 4-wire) and Serial Interface Sync (
SIF
Sync
).
•
Input Format: provides control of the input data format (that is, 2’s complement or offset binary).
•
Parity: provides configuration of the parity input.
•
PLL Settings: provides configuration of the on-chip PLL circuitry.
•
Temperature Sensor: provides temperature monitoring of DAC348x die temperature.
2.2.1.1
FIFO Settings
The DAC348x has 8-samples deep FIFO to relax the timing requirement of a typical transmitter system.
The FIFO has an input pointer and an output pointer, and both pointers can accept various input sources
as reset triggers of input and output pointer position. One important application for input and output pointer
control is the ability to synchronize multiple DACs in the system. For additional information, see the
relevant DAC348x data sheet.
•
FIFO Offset: The default position of FIFO output pointer after reset by the synchronization source. This
setting can be used to change the latency of the DAC348x.
•
Data Formatter Sync (DAC3482 and DAC3484): Synchronization source for FIFO data formatter.
Select between LVDS FRAME or LVDS SYNC signals.
