Texas Instruments TSW308 Series, User Manual

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Software Control
11 SLAU374B – December 2011 – Revised May 2016
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TSW308x Evaluation Module
● Inverse sinx/x filter: allows compensation of the sinx/x attenuation of the DAC output.
Note: If inverse sinx/x filter is used, the input data digital full-scale must be backed off
accordingly to avoid digital saturation.
● Clock Receiver Sleep: allows the DAC clock receiver to be in sleep mode. The DAC has minimum
power consumption in this mode.
● Clock Divider Sync: allows the synchronization of the internal divided-down clocks using either
Frame, Sync, or OSTR signal. Enables the divider sync as part of the initialization procedure or
resynchronization procedure.
● Group Delay: allows adjustment of group delay for each I/Q channel. This is useful for wideband
sideband suppression.
Note: This feature is not available for the DAC34SH84.
● Offset Adjustment: allows adjustment of dc offset to minimize the LO feedthrough of the modulator
output. This section requires synchronization for proper operation. The synchronization options
follow:
— REGWR: auto-sync from SIF register write. If this option is chosen, the GUI
automatically synchronizes the offset adjustment with each value update by writing to
0x08 (Offset A) or 0x0A (Offset C) registers last.
— OSTR : sync from the external LVPECL OSTR signal. Clock divider sync must be enabled with
OSTR set as sync source.
— SYNC : sync from the external LVDS SYNC signal.
— SIF SYNC: sync from SIF Sync. Uncheck and check the SIF Sync button for sync event.
● QMC Adjustment: allows adjustment of the gain and phase of the I/Q channel to minimize sideband
power of the modulator output.
— REGWR: auto-sync from SIF register write. If this option is chosen, the GUI
automatically synchronizes the offset adjustment with each value update by writing to
0x10 (QMC PhaseAB) or 0x11 (QMC PhaseCD) registers last.
— OSTR : sync from the external LVPECL OSTR signal. Clock Divider Sync must be enabled with
OSTR set as sync source.
— SYNC : sync from the external LVDS SYNC signal.
— SIF SYNC: sync from SIF Sync. Uncheck and check the SIF Sync button for sync event.
● NCO: allows fine mixing of the I/Q signal. The procedure to adjust the NCO mixing frequency
follows.
1. Enter the DAC sampling frequency in Fsample.
2. Enter the desired mixing frequency in both NCO freq_AB and NCO freq_CD.
3. Press Update freq.
4. Synchronize the NCO block from the following options.
— REGWR: auto-sync from SIF register write. Writing to either Phase OffsetAB or Phase
OffsetCD can create a sync event.
— OSTR : sync from the external LVPECL OSTR signal. Clock Divider Sync must be enabled with
OSTR set as sync source. See the data sheet for OSTR period requirement.
— SYNC : sync from the external SYNC signal.
— SIF SYNC: sync from SIF Sync. Uncheck and check the SIF Sync button for sync event.