Basic Test Procedure with TSW3100
24
SLAU374B – December 2011 – Revised May 2016
Copyright © 2011–2016, Texas Instruments Incorporated
TSW308x Evaluation Module
4
Basic Test Procedure with TSW3100
This section outlines the basic test procedure for testing the EVM with the TSW3100.
4.1
TSW3100 Overview
The TSW3100 is a high speed pattern generator board. See the TSW3100 user’s guide (
) for
more detailed explanations of the TSW3100 setup and operation. This document assumes that the
TSW3100 software is installed and functioning properly. The TSW308x needs TSW3100 operating
software version 2.5 or higher with TSW3100 board Rev D (or higher).
The TSW308xEVM sends the FPGA reference clock to the FPGA of the TSW3100EVM in LVDS format.
Therefore, a 100-
Ω
LVDS termination resistor is needed at the TSW3100 FPGA clock input. All the latest
TSW3100EVMs from TI have the 100-
Ω
termination installed at the bottom side of the board on pins T31
and T32 of the FPGA. Contact TI Application Support if the 100-
Ω
termination is missing and assistance is
needed for the 100-
Ω
installation.
Figure 20. TSW3100 FPGA Clock 100-
Ω
LVDS Termination at Pins T31 and T32 of the FPGA
