Usage Notes and Known Design Exceptions to Functional Specifications
14
SPRZ412K – December 2013 – Revised February 2020
Copyright © 2013–2020, Texas Instruments Incorporated
TMS320F2837xD Dual-Core MCUs Silicon Revisions C, B, A, 0
Advisory
ADC: ADC Input Multiplexer Connection at Beginning of Acquisition Window
Revision(s) Affected
0, A
Details
The input of the ADC may experience a brief connection to either V
SSA
or another input
channel at the beginning of the sample-and-hold phase of the conversion. The
conditions where this occurs are summarized below:
•
If the previously converted channel is the same as the currently converting channel,
then
no additional connection occurs
.
•
If the previously converted channel and the currently converting channel are both
odd-numbered channels or both even-numbered channels (for example, A6 and
A14), then
the two channels will be briefly connected
.
•
If the previously converted channel and the currently converting channel are not both
odd-numbered channels or not both even-numbered channels (for example, A6 and
A15), then
the currently converting channel will be briefly connected to V
SSA
.
In the worst case, the connection resistance could be as low as 30
Ω
and the duration of
the connection could be as long as 5 ns.
Workaround(s)
This typically will not present a significant issue for low-impedance signal sources (for
example, an op-amp). For high-impedance sources, it may be necessary to increase the
duration of the acquisition window beyond what would be suggested by the
characteristics of the ADC input model.
