OMAP 2420 and the CLK Module
D-4
In addition, you must route the appropriate clock sources to each GP
timer (32KHz to the low-resolution timer, SYSCLK to the high-resolution
timer). This can also be done using the following ARM-side GEL
commands or dedicated ARM code.
hotmenu RouteGPTClocks() {
/* CM_FCKLEN1_CORE */
/* Enable functional clock to GPT 5,6,7 */
(*(int*)0x48008200) = 0x380;
/* CM_ICKLEN1_CORE */
/* Enable interface clock to GPT 5,6,7 */
(*(int*)0x48008210) = 0x380;
/* CM_CLKSEL2_CORE */
/* route 32kHz clock to gpt5,6 and sys_clk to gpt7 */
(*(int*)0x48008244) = 0x1000;
/* PRCM_CLKCFG_CTRL */
/* Validate CLK config in previous step */
(*(int*)0x48008080) = 1;
}
