Texas Instruments TMS320C54x, User Manual

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Overlay Pages
7-48
7.11 Overlay Pages
Some target systems use a memory configuration in which all or part of the
memory space is overlaid by shadow memory. This allows the system to map
different banks of physical memory into and out of a single address range in
response to hardware selection signals. In other words, multiple banks of
physical memory overlay each other at one address range. You may want the
linker to load various output sections into each of these banks or into banks
that are not mapped at load time.
The linker supports this feature by providing overlay pages. Each page
represents an address range that must be configured separately with the
MEMORY directive. You can then use the SECTIONS directive to specify the
sections to be mapped into various pages.
7.11.1 Using the MEMORY Directive to Define Overlay Pages
To the linker, each overlay page represents a completely separate memory
comprising the full 24-bit range of addressable locations. This allows you to
link two or more sections at the same (or overlapping) addresses if they are
on different pages.
Pages are numbered sequentially, beginning with 0. If you do not use the
PAGE option, the linker allocates initialized sections into PAGE 0 (program
memory) and uninitialized sections into PAGE 1 (data memory).
For example, assume that your system can select between two banks of
physical memory for data memory space: address range A00h to FFFFh for
PAGE 1 and 0A00h to 2BFF for PAGE 2. Although only one bank can be
selected at a time, you can initialize each bank with different data. This is how
you use the MEMORY directive to obtain this configuration:
Example 7–10. Memory Directive With Overlay Pages
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MEMORY
{
PAGE 0 : ONCHIP : origin = 0800h, length = 0240h
: PROG : origin = 02C00h, length = 0D200h
PAGE 1 : OVR_MEM : origin = 0A00h, length = 02200h
: DATA : origin = 02C00h, length = 0D400h
PAGE 2 : OVR_MEM : origin = 0A00h, length = 02200h
}