19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
G
N
D
G
N
D
JMP145
JMP38
JMP37
G
N
D
G
N
D
T
X
C
L
K
A
R
X
C
L
K
A
STATIC CLOCK
DRIVEN ON TDA[19:0]
www.ti.com
Peripheral Ports
Figure 15. TDA[19:0] Static Clock Data Pattern Example
12
Peripheral Ports
The TLK6002EVM can support three small peripheral boards which can contain any sort of additional
circuitry required for effective evaluation of the TLK6002 device. Examples of additional circuitry that can
be implemented include a clock source such as an oscillator with multiplier/divider chip, FPGA, CPLD, or
even an optical module to name a few. All of the power rails (1.2 V, 1.5/8 V, 2.5 V, 3.3 V and 5 V) have
been provided to allow for minimal power circuitry on the peripheral board itself as well as the global reset
signal which is connected to the TLK6002 Reset pin. TI is developing an optical module peripheral board
and a clock multiplier and divider peripheral board specifically for use with the TLK6002EVM which will be
capable of providing practically any clock frequency needed for operation of the TLK6002 device.
However, these boards are not complete and ready for distribution with the TLK6002EVM. See sheet 28
of the TLK6002EVM schematic located in
Section 14
as well as the line item in the bill of materials for
connector part number information.
23
SLLU132 – October 2010
TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver
Evaluation Module
Submit Documentation Feedback
Copyright © 2010, Texas Instruments Incorporated