RESISTOR
POWER
RESISTOR
POWER
RESISTOR
POWER
RESISTOR
POWER
RESISTOR
POWER
1P5/8V
1P5/8V
1P5/8V
1P5/8V
1P5/8V
1P5/8V
PRTAD 0
PRTAD 1
PRTAD 2
PRTAD 3
PRTAD 4
REFCLK A SEL
REFCLK B SEL
RATE A 2
RATE A 1
RATE A 0
CODEA EN
LOSA
PD TRXA
G
N
D
G
N
D
G
N
D
G
N
D
G
N
D
G
N
D
GND
GND
RATE B2
RATE B1
RATE B0
CODEB EN
LOSB
PD TRXB
AMUXB
AMUXA
TESTEN
CLKOUTSEL
PRBS EN
GPI1
GPI0
PRBSB FAIL
PRBSB PASS
PRBSB
PRBSA
PRBSA FAIL
PRBSA PASS
A
B
LOSA
LOSB
PRBS PASS
D41
D42
D4
D3
D52
D51
D50
D49
JMP43
JMP23
JMP21
JMP17
JMP16
JMP27
JMP25
JMP26
JMP24
JMP29
JMP28
JMP33
JMP31
PULLUP RESISTORS ARE CONNECTED
TO ALL CONTROL INPUT LINES
THROUGH THESE HEADERS.
REMOVING THE SHUNTS ON THESE
HEADERS WILL DISCONNECT ALL THE
PULLUP RESISTORS FROM THE 1P5/8V
PLANE FOR MORE ACCURATE CURRENT
MEASUREMENTS.
LOGIC “HIGH” VOLTAGE LEVELS WILL
HAVE TO BE MANUALLY DRIVEN .
THE PINS ON THIS
SIDE OF ALL HEADER
BLOCKS ARE GND
RESISTOR
POWER
CHANNEL A
CONTROL AND
STATUS PINS . THE
LOSA LED IS
LOCATED BELOW
CHANNEL B
CONTROL AND
STATUS PINS . THE
LOSB LED IS
LOCATED BELOW
PRBS_PASS SIGNALS
PRBS_PASS SIGNAL LEDS
PRBS_PASSB SIGNAL
LATCH LEDS
PRBS_PASSA SIGNAL
LATCH LEDS
PULLUP RESISTORS ARE CONNECTED
TO ALL CONTROL INPUT LINES .
REMOVING THE SHUNTS ON THE
CONTROL BLOCK HEADERS WILL CAUSE
THE PULLUP RESISTOR TO PULL THE
LINE TO A LOGIC “HIGH” AND PLACING A
SHUNT ON THE LINE WILL SHORT THE
LINE TO GND CREATING A LOGIC “LOW” .
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Control and Output Status Signals
6
Control and Output Status Signals
All of the external control and status pins on the TLK6002EVM have been consolidated to a single location
on the board and broken out into several header blocks for easier reference. LEDs have been added to
the LOSA, LOSB, PRBS_PASSA, and PRBS_PASSB lines in addition to the headers for scope probes, to
allow easy monitoring of the High/Low value on the line. The LED is ON when the line is a Logic High, and
the LED is OFF when the line is a logic low. If the line is toggling, a dimming of the LED may be observed
as the LED is pulsing on and off relative to the activity on the line.
Figure 8. Control Connectors (JMP17, JMP23, JMP26, JMP27, JMP29, JMP33, JMP43)
6.1
Control Signal and Status Pin Descriptions:
PRTAD[4:0]: Port Address. Used to select the Port ID.
11
SLLU132 – October 2010
TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver
Evaluation Module
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