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Block Diagram
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RF
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2.4-GHz
Bluetooth
low energy Compliant and Proprietary RF System-on-Chip
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Supports 250-kbps, 500-kbps, 1-Mbps, 2-Mbps Data Rates
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Excellent link budget, enabling long-range applications without external front end
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Programmable output power up to 0 dBm
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Excellent receiver sensitivity (–94 dBm at 1 Mbps), selectivity, and blocking performance
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Suitable for systems targeting compliance with worldwide radio frequency regulations: ETSI EN 300
328 and EN 300 440 Class 2 (Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan)
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Layout
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Few external components
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Reference design provided
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6-mm × 6-mm QFN-40 package
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Pin-compatible with CC2540 (when not using USB or I
2
C)
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Low Power
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Active-mode RX down to: 17.9 mA
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Active-mode TX (0 dBm): 18.2 mA
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Power mode 1 (4-µs wake-up): 270 µA
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Power mode 2 (sleep timer on): 1 µA
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Power mode 3 (external interrupts): 0.5 µA
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Wide Supply-voltage range (2 V–3.6 V)
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TPS62730
Compatible low power in active mode
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RX down to: 14.7 mA (3-V supply)
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TX (0 dBm): 14.3 mA (3-V supply)
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Microcontroller
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High-performance and low-power 8051 microcontroller core with code Prefetch
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In-system-programmable flash, 128- or 256-KB
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8-KB RAM with retention in all power modes
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Hardware-debug support
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Extensive baseband automation, including auto-acknowledgment and address decoding
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Retention of all relevant registers in all power modes
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Peripherals
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Powerful five-channel DMA
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General-purpose timers (one 16-Bit, two 8-Bit)
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IR generation circuitry
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32-kHz sleep timer with capture
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Accurate digital RSSI support
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Battery monitor and temperature sensor
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12-Bit ADC with eight channels and configurable resolution
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AES security coprocessor
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Two powerful USARTs with support for several serial protocols
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23 general-purpose I/O Pins (21 × 4 mA, 2 × 20 mA)
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I
2
C interface
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Two I/O pins have LED Driving capabilities
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Watchdog timer
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Integrated high-performance comparator
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Development Tools
6
Wireless Heart Rate Monitor Reference Design
TIDU195A – January 2014 – Revised July 2014
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