SM320C6455-EP
FIXED-POINT DIGITAL SIGNAL PROCESSOR
SPRS462B – SEPTEMBER 2007 – REVISED JANUARY 2008
7.17
Enhanced Turbo Decoder Coprocessor (TCP2)
......................................................................
221
7.17.1
TCP2 Device-Specific Information
...........................................................................
221
7.17.2
TCP2 Peripheral Register Description(s)
...................................................................
222
7.18
Peripheral Component Interconnect (PCI)
............................................................................
223
7.18.1
PCI Device-Specific Information
.............................................................................
223
7.18.2
PCI Peripheral Register Description(s)
......................................................................
224
7.18.3
PCI Electrical Data/Timing
....................................................................................
229
7.19
UTOPIA
....................................................................................................................
230
7.19.1
UTOPIA Device-Specific Information
........................................................................
230
7.19.2
UTOPIA Peripheral Register Description(s)
................................................................
230
7.19.3
UTOPIA Electrical Data/Timing
..............................................................................
231
7.20
Serial RapidIO (SRIO) Port
..............................................................................................
234
7.20.1
Serial RapidIO Device-Specific Information
................................................................
234
7.20.2
Serial RapidIO Peripheral Register Description(s)
........................................................
234
7.20.3
Serial RapidIO Electrical Data/Timing
.......................................................................
244
7.21
General-Purpose Input/Output (GPIO)
.................................................................................
246
7.21.1
GPIO Device-Specific Information
...........................................................................
246
7.21.2
GPIO Peripheral Register Description(s)
...................................................................
246
7.21.3
GPIO Electrical Data/Timing
..................................................................................
247
7.22
Emulation Features and Capability
.....................................................................................
248
7.22.1
Advanced Event Triggering (AET)
...........................................................................
248
7.22.2
Trace
.............................................................................................................
248
7.22.3
IEEE 1149.1 JTAG
.............................................................................................
249
7.22.3.1
JTAG Device-Specific Information
...............................................................
249
7.22.4
JTAG Peripheral Register Description(s)
...................................................................
249
7.22.5
JTAG Electrical Data/Timing
.................................................................................
249
Revision History
........................................................................................................................
250
8
Mechanical Data
...............................................................................................................
251
8.1
Thermal Data
..............................................................................................................
251
8.2
Packaging Information
...................................................................................................
251
Contents
6
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