ADC Results
4-3
Results Obtained With AD50 EVM
Figure 4–2. AD50-EVM ADC Distortion Measurement at 20 ksps
–60
–80
–110
–130
0
1
2
3
4
5
6
Full Scale – dB
–40
–10
f – Frequency – kHz
0
7
8
9
10
–20
–30
–50
–70
–90
–100
–120
Input Signal: 1.1 kHz, –3 dB
FFT: 20 ksa/s, 2048 Frequency Bins,
16 Averages
Figure 4–2 shows an FFT plot obtained from the ADC while sampling at
20 ksps. The performance figures were 82.7 dB SNR, 81.0 dB SDR and
78.7 dB SINAD.
Summary of Contents for SLAU039
Page 6: ...vi ...
Page 16: ...1 6 ...
Page 26: ...2 10 ...
Page 34: ...3 8 ...
Page 40: ...4 6 ...
Page 47: ...Circuit Diagrams A 7 Installing the AD50 EVM A 4 Circuit Diagrams ...
Page 48: ...A 8 ...
Page 49: ...A 9 Installing the AD50 EVM ...
Page 50: ...A 10 ...
Page 51: ...PCB Diagrams A 11 Installing the AD50 EVM A 5 PCB Diagrams Top Side Silkscreen ...
Page 52: ...A 12 1 Top Side Tracks Top Side Tracks ...
Page 53: ...A 13 Installing the AD50 EVM Bottom Side Tracks ...
Page 54: ...A 14 Ground plane ...
Page 55: ...A 15 Installing the AD50 EVM Power plane ...
Page 56: ...A 16 ...