Analog Input
2-8
For a full-scale signal the outputs of the op amps that drive the codec inputs
will reach 4 V. Many op amps will not behave well at this output level with a 5-V
supply (in fact the system was tested at 4.75 V to allow for the minimum rated
power supply voltage of the AD50).
Miniature systems often require that analog and digital circuits be in close
proximity to each other. This can lead to problems where radio frequency inter-
ference from clock signals or DSP bus lines is demodulated by op amps, lead-
ing to an increased DC offset. If the RF is modulated, then that modulation may
appear at the op amp output. CMOS and BiFET op amps can be more resistant
to demodulating RF than bipolar devices. Take particular care to keep digital
signals away from analog ones, and be generous with power supply decoup-
ling and filtering. Power planes help a great deal in reducing system noise.
The authors chose the TI device TLC2272 which is a low noise CMOS dual
op amp designed for single supply operation. It has full rail to rail output swing
and low distortion. However the distortion increases when driving loads of
about 2 k
Ω
or less.
2.6.4
Antialiasing Filter
Sigma-delta converters have the advantage of providing anti-aliasing filtering
as an integral part of their operation. However this filtering has
holes in it, at
multiples of the oversampling frequency. The AD50 is a 64 times oversampling
converter so for a sampling rate of 20 kHz the first
hole will be centered at
1.28 MHz and will be 20 kHz wide. It is important to ensure that no energy at
this frequency is present across the inputs to the codec. A simple single pole
RC filter is sufficient. If ceramic capacitors are used for this filter they should
be of the COG or NPO dielectric type. Significant distortion can be introduced
by the voltage dependent capacitance of other types of dielectric. Two filter
configurations are possible, as shown in Figure 2–4.
Figure 2–4. AD50-EVM Antialiasing Filter Options
(a)
_
+
4.7 k
Ω
1/2 TLC2272
_
+
4.7 k
Ω
1/2 TLC2272
220 pF
INP
INM
TLC320AD50C
_
+
4.7 k
Ω
1/2 TLC2272
_
+
4.7 k
Ω
1/2 TLC2272
470 pF
INP
INM
TLC320AD50C
470 pF
(b)
Figure 2–4a gives good rejection of differential noise signals but common
mode noise is not removed.
Figure 2–4b gives good rejection of common mode noise signals and, if the
capacitors and resistors are well matched, good rejection of differential noise.
Summary of Contents for SLAU039
Page 6: ...vi ...
Page 16: ...1 6 ...
Page 26: ...2 10 ...
Page 34: ...3 8 ...
Page 40: ...4 6 ...
Page 47: ...Circuit Diagrams A 7 Installing the AD50 EVM A 4 Circuit Diagrams ...
Page 48: ...A 8 ...
Page 49: ...A 9 Installing the AD50 EVM ...
Page 50: ...A 10 ...
Page 51: ...PCB Diagrams A 11 Installing the AD50 EVM A 5 PCB Diagrams Top Side Silkscreen ...
Page 52: ...A 12 1 Top Side Tracks Top Side Tracks ...
Page 53: ...A 13 Installing the AD50 EVM Bottom Side Tracks ...
Page 54: ...A 14 Ground plane ...
Page 55: ...A 15 Installing the AD50 EVM Power plane ...
Page 56: ...A 16 ...