Texas Instruments OMAP36 Series, Technical Reference Manual, Page: 629 / 3738

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PRCM Register Manual
Bits Field Name Description Type Reset
31:24 RESERVED Write 0s for future compatibility. Read is undefined. R 0x00
23:16 CMDRA1 Set the ON/ON-LP/Retention/OFF command RW 0x00
configuration register address value for the second VDD
channel (VDD2).
15:8 RESERVED Write 0s for future compatibility. Read is undefined. R 0x00
7:0 CMDRA0 Set the ON/ON-LP/Retention/OFF command RW 0x00
configuration register address value for the first VDD
channel (VDD1).
Table 3-444. Register Call Summary for Register PRM_VC_SMPS_CMD_RA
PRCM Basic Programming Model
• Voltage Controller Registers : [0]
• PRM_VC_BYPASS_VAL (Voltage Controller Bypass Command Register) : [1]
• Voltage Controller Initialization Basic Programming Model : [2] [3]
PRCM Register Manual
• Global_Reg_PRM Register Summary : [4]
Table 3-445. PRM_VC_CMD_VAL_0
Address Offset 0x0000 002C
Physical Address 0x4830 722C Instance Global_Reg_PRM
Description This register allows the setting of the ON/Retention/OFF voltage level values for the first VDD channel.
Type RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ON ONLP RET OFF
Bits Field Name Description Type Reset
31:24 ON Set the ON voltage level value for the first VDD channel RW 0x00
(VDD1).
23:16 ONLP Set the ON-LP voltage level value for the first VDD RW 0x00
channel (VDD1).
15:8 RET Set the RET voltage level value for the first VDD channel RW 0x00
(VDD1).
7:0 OFF Set the OFF voltage level value for the first VDD channel RW 0x00
(VDD1).
Table 3-446. Register Call Summary for Register PRM_VC_CMD_VAL_0
PRCM Functional Description
• Sleep Sequences : [0]
• Wake-Up Sequences : [1]
PRCM Basic Programming Model
• Voltage Controller Registers : [2]
PRCM Register Manual
• Global_Reg_PRM Register Summary : [3]
629 SWPU177N – December 2009 – Revised November 2010 Power, Reset, and Clock Management
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