prcm-099
WKUP Event
sys_off_mode
VDD1
PRM_VOLTOFFSET[15:0] OFFSET_TIME PRM_VOLTSETUP2[15:0] OFFMODESETUPTIME
sys_32k
sys_clkreq
VDD2
SYS_CLK
PRM_CLKSETUP[15:0] SETUPTIME (1) (stabilization time)
0v
Vopp
0v
Vopp
Public Version
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PRCM Basic Programming Model
when the voltage is already ramped and stabilized, which would induce some leakage. Program this bit
field to match the following equation:
[15:0]OFFMODESETUPTIME. This way, the
voltages and clock are ready at the same time. This register is used on device wakeup from off mode
when the off sequence is supervised by the power IC.
The OFFSET_TIME bit field of this register is configured as the number of 32-kHz clock cycles time delay
in assertion of sys_off_mode. This register is used on device wakeup from off mode when the off
sequence is supervised by the power IC.
shows off mode wakeup using SYS_OFF_MODE.
Figure 3-89. OFF Mode Wakeup Using SYS_OFF_MODE
(1)
[15:0] SETUPTIME is not used during device cold boot-up sequence.
3.6.5.1.3 PRM_VOLTCTRL (Voltage Source Control Register)
This register allows control of the power IC. The following are the register bit fields:
•
AUTO_SLEEP: Automatically sends the sleep command when the voltage domain is in the appropriate
standby mode
•
AUTO_RET: Automatically sends the retention command when the voltage domain is in the
appropriate standby mode
•
AUTO_OFF: Automatically sends the off command when the voltage domain is in the appropriate
standby mode
•
SEL_OFF: Controls whether the off command is sent through the voltage controller I
2
C interface or the
signal sys_off_mode is asserted when entering off mode
•
SEL_VMODE: Allows control of the power IC through either the voltage controller I
2
C interface or the
VMODE interface
3.6.5.2
Voltage Controller Registers
A specific set of registers allows control of the voltage controller. This register set provides programming
flexibility to address different power IC device types through an I
2
C interface.
The register set is composed of the following registers:
•
Registers to store the addresses on the I
2
C bus:
–
421
SWPU177N – December 2009 – Revised November 2010
Power, Reset, and Clock Management
Copyright © 2009–2010, Texas Instruments Incorporated