D
e
v
ic
e
p
o
w
e
r
o
n
Power on RESET
Start
Set slave address 1
1
.
A
s
s
ig
n
p
o
w
e
r
IC
s
la
v
e
a
d
d
re
s
s
e
s
End
Set register address 0
2
.
V
o
lt
a
g
e
c
o
n
fi
g
u
ra
ti
o
n
re
g
is
te
rs
a
d
d
re
s
s
Set register address 0
Set slave address 2
Set register address 1
Set register address 1
3
.
C
o
m
m
a
n
d
c
o
n
fi
g
u
ra
ti
o
n
re
g
is
te
rs
a
d
d
re
s
s
Yes
No
Set PRM_VC_CH_CONF
SAx to 1
Yes
Set PRM_VC_CH_CONF
RAVx to 1
VDDx will use voltage
configuration register
address 0?
No
Yes
Set PRM_VC_CH_CONF
RACx to 1
VDDx will use command
configuration register
address 0?
No
Yes
Set PRM_VC_CH_CONF
CMDx to 1
VDDx will use command
voltage levels 0?
No
4
.
S
e
t
c
o
n
fi
g
u
ra
ti
o
n
p
o
in
te
rs
fo
r
th
e
V
D
D
c
h
a
n
n
e
ls
Yes
No
I C in HS mode?
2
Clear PRM_VC_I2C_CFG
HSEN to 0
Set master code in
PRM_VC_I2C_CFG
MCODE
Yes
No
I C in repeated start
2
operation?
Clear PRM_VC_I2C_CFG
SREN to 0
5
.
I
C
C
o
n
fi
g
u
ra
ti
o
n
2
Two power ICs
supported?
Yes
Yes
Set PRM_VC_CH_CONF
RACENx to 1
Voltage FSMx uses voltage
register address to send voltage
commands?
No
VDDx will use register
slave address 0 for
power IC?
NOTE:
In process 5, x in the bit
names (e.g., SAx), Voltage channel
names (e.g., VDDx) and the Voltage
FSMs name (e.g., FSMx) can be 1 or
2 and refers respectively to VDD1
and VDD2 voltage channels.
No
prcm-UC-008
Public Version
www.ti.com
PRCM Basic Programming Model
3.6.6.6
Voltage Controller Initialization Basic Programming Model
is the flow chart for voltage controller initialization.
Figure 3-98. Voltage Controller Initialization Flow Chart
1. Assign power IC slave addresses.
439
SWPU177N – December 2009 – Revised November 2010
Power, Reset, and Clock Management
Copyright © 2009–2010, Texas Instruments Incorporated
