Texas Instruments OMAP36 Series, Technical Reference Manual

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PRCM Register Manual
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Table 3-167. CM_CLKSEL_SGX
Address Offset 0x0000 0040
Physical Address 0x4800 4B40 Instance SGX_CM
Description SGX clock selection.
Type RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED
CLKSEL_SGX
Bits Field Name Description Type Reset
31:3 RESERVED Write 0s for future compatibility. Read return 0. R 0x00000000
2:0 CLKSEL_SGX Selects SGX functional clock RW 0x0
0x0: SGX functional clock is CORE_CLK divided by 3
0x1: SGX functional clock is CORE_CLK divided by 4
0x2: SGX functional clock is CORE_CLK divided by 6
0x3: SGX functional clock is CM_96M_FCLK clock
0x4: SGX functional clock is SGX_192M_FCLK clock
0x5: SGX functional clock is CORE_CLK divided by 2
0x6: SGX functional clock is COREX2_CLK divided by 3
0x7: SGX functional clock is COREX2_CLK divided by 5
Table 3-168. Register Call Summary for Register CM_CLKSEL_SGX
PRCM Functional Description
• Interface and Peripheral Functional Clock Configurations : [0] [1] [2] [3]
PRCM Basic Programming Model
• CM_CLKSEL_ <domain_name> (Clock Select Register) : [4] [5] [6]
PRCM Register Manual
• SGX_CM Register Summary : [7]
Table 3-169. CM_SLEEPDEP_SGX
Address Offset 0x0000 0044
Physical Address 0x4800 4B44 Instance SGX_CM
Description This register allows enabling or disabling the sleep transition dependency of SGX domain with respect
to other domain.
Type RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED
EN_MPU
RESERVED
490 Power, Reset, and Clock Management SWPU177N – December 2009 – Revised November 2010
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