Public Version
UART/IrDA/CIR Functional Description
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A transmission frame can be aborted by setting the UART3.
[1] ABORT_EN bit to 1.
When this bit is set to 1, 0x7D and 0xC1 are transmitted and the frame is not terminated with CRC or stop
flags.
The receiver treats a frame as an aborted frame when a 0x7D character followed immediately by a 0xC1
character is received without transparency.
CAUTION
When the transmit FIFO is not empty and the UART3.
[5] SCT bit is
set to 1, the UART IrDA starts a new transfer with data of a previous frame
when the abort frame is sent. Therefore, TX FIFO must be reset before sending
an abort frame.
19.4.4.2.4.2 Pulse Shaping
The SIR mode supports both the 3/16th or the 1.6-µs pulse duration methods. The
UART3.
[7] PULSE_TYPE bit selects the pulse width method in the transmit mode.
19.4.4.2.4.3 SIR Free Format Programming
The SIR FF mode is selected by setting the module in the UART mode (UART3.
MODE_SELECT = 0x0) and the UART3.
[3] UART_PULSE bit to 1 to allow pulse shaping.
Because the bit format remains the same, some UART mode configuration registers must be set at
specific values:
•
UART3.
[1:0] CHAR_LENGTH field = 0x3 (8 data bits)
•
UART3.
[2] NB_STOP bit = 0x0 (1 stop-bit)
•
UART3.
[3] PARITY_EN bit = 0x0 (no parity)
The UART mode interrupts are used for the SIR FF mode, but many of them are not relevant (XOFF,
RTS, CTS, modem status register, etc.).
19.4.4.2.5 MIR and FIR Mode Data Formatting
This section describes common instructions for FIR and MIR mode programming.
At the end of a frame reception, the MPU reads the line status register (UART3.
) to detect
possible errors in the received frame.
When the UART3.
[6] SIP_MODE bit is set to 1, the TX state-machine always sends one SIP
at the end of a transmission frame. However, when the SIP_MODE bit is set to 0, SIP transmission
depends on the UART3.
[3] SEND_SIP bit.
The system (MPU) can set the SEND_SIP bit at least once every 500 ms. The advantage of this approach
over the default approach is that the TX state-machine does not have to send the SIP at the end of each
frame, which can reduce the overhead required.
19.4.4.2.6 IrDA Mode Interrupt Management
19.4.4.2.6.1 IrDA Interrupts
The IrDA function generates interrupts. All interrupts can be enabled/disabled by writing to the appropriate
bit in the interrupt enable register (UART3.
). The interrupt status of the device can be checked at
any time by reading the interrupt identification register (UART3.
The UART, IrDA, and CIR modes have different interrupts in the UART/IrDA/CIR module and, therefore,
different UART3.
and UART3.
mappings, depending on the selected mode.
The IrDA modes have eight possible interrupts (see
). The interrupt line is activated when any
of the eight interrupts is generated (there is no priority).
2914
UART/IrDA/CIR
SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated
