Texas Instruments OMAP36 Series, Technical Reference Manual

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UART/IrDA/CIR Functional Description
Table 19-35. IrDA Mode Interrupts
IIR_REG Bit Interrupt Type Interrupt Source Interrupt Reset Method
0 RHR interrupt DRDY (data ready) (FIFO Read RHR_REG until interrupt condition
disable) disappears.
RX FIFO above trigger level
(FIFO enable)
1 THR interrupt TFE ( THR_REG empty) (FIFO Write to THR_REG until interrupt
disable) condition disappears.
TX FIFO below trigger level
(FIFO enable)
2 Last byte in RX FIFO Last byte of frame in RX FIFO Read RHR_REG .
is available to be read at the
RHR port.
3 RX overrun Write to RHR_REG when RX Read RESUME_REG register.
FIFO full.
4 Status FIFO interrupt Status FIFO triggers level Read STATUS FIFO.
reached.
5 TX status
1. THR_REG empty before 1. Read RESUME_REG register.
EOF sent. Last bit of OR
transmission of the IrDA
2. Read IIR_REG .
frame occurred, but with
an underrun error.
OR
2. Transmission of the last bit
of the IrDA frame
completed successfully.
6 Receiver line status interrupt CRC, ABORT, or frame-length Read STATUS FIFO (read until empty -
error is written into STATUS maximum of eight reads required).
FIFO.
7 Received EOF Received end-of-frame. Read IIR_REG .
19.4.4.2.6.2 Wake-Up Interrupts
The wake-up interrupt for the IrDA mode has the same functionality as that for the UART mode (see
Section 19.4.4.1.4.1 , Wake-Up Interrupt).
CAUTION
Wake-up interface implementation in this mode is based on the
UARTi_SIDLEACK low-to-high transition instead of the UARTi_SIDLEACK
state.
This does not ensure wake-up event generation as expected when configured
in smart-idle mode and the system wakes up for a short period.
19.4.4.3 CIR Mode (UART3 Only)
19.4.4.3.1 CIR Mode Clock Generation
Depending on the encoding method (variable pulse distance/biphase), the MPU must develop a data
structure that combines 1 and 0 with a t period to encode the complete frame to transmit. This can then be
transmitted to the infrared output with a modulation method, as shown in
Figure 19-33 .
2915 SWPU177N – December 2009 – Revised November 2010 UART/IrDA/CIR
Copyright © 2009–2010, Texas Instruments Incorporated