VDD1
VSS1
VDDA or VDDA1
VSSA or VSSA1
10
W
10
W
0.01
F
m
1
F
m
S0315-02
GC5328
www.ti.com
SLWS218A – OCTOBER 2009 – REVISED OCTOBER 2009
Figure 8. Recommended Filter for VDDA, VDDA1 Power
TX OUTPUT TO DAC5682Z AND DAC5688
The earlier figures show the GC5328 to DAC data, sync, and clock signals. These tables list the specific GC5328
to DAC TX connections.
Table 2. GC5328 TX (Single-Channel Single-Ended HSTL – DAC5688)
PIN NAME
PIN NUMBER
I/O
DESCRIPTION
DACI[15:10]
TX15, TX14, TX11, TX10, TX7, TX6
O
DAC-I output
DACI[9:0]
TX3, TX2, TX1, TX0, TX4, TX5, TX8, TX9, TX12,
O
DAC-I output
TX13
DACQ[15:10]
TX24, TX25, TX28, TX29, TX32, TX33
O
DAC-Q output
DACQ[9:0]
TX36, TX37, TX35, TX34, TX31, TX30, TX27,
O
DAC-Q output
TX26, TX23, TX22
DACCLK
TX21
O
Clock to DAC
DACCLKC
TX20
O
Cmplementary clock to DAC
DACSYNC
TX18
O
Output data sync
Table 3. GC5328 TX (Single Channel Differential HSTL – DAC5682Z)
PIN NAME
PIN NUMBER
I/O
DESCRIPTION
DAC[15:10]P
TX10, TX6, TX2, TX0, TX4, TX8
O
DAC positive output
DAC[9:0]N
TX12, TX16, TX23, TX27, TX31, TX35, TX32,
O
DAC negative output
TX36, TX29, TX25
DAC[15:10]N
TX11, TX7, TX3, TX1, TX5, TX9,
O
DAC negative output
DAC[9:0]N
TX13, TX17, TX22, TX26, TX30, TX34, TX33,
O
DAC negative output
TX37, TX28, TX24
DACCLK
TX21
O
Clock to DAC
DACCLKC
TX20
O
Complementary clock to DAC
DACSYNCP
TX14
O
Positive output data sync
DACSYNCN
TX15
O
Negative output data sync
FB INPUT FROM LVDS ADC
Figure 6
shows the ADC data and clock signals to the GC5328. These tables list the specific ADC-to-GC5328 FB
connections. There are two feedback (FB) ports, A and B. Port A has faster timing and is preferred. There are
several ADC styles:
•
LVDS DDR – ADS5545 (ADS61x9, ADS5517)
•
LVDS DDR – ADS62C17 – reversed data alignment (same connections as ADS5545)
•
LVDS SDR – ADS5544
ADCs are typically connected to the GC5328 so the MSB of the ADC is connected to FB port A MSB. The lower
bit numbers follow until the ADC bits are all connected. Any remaining lower-order bits on the FB port should be
terminated with resistors, P connection to GND, N connection to 1.8 V as a logic 0. See the GC5325 schematic
listed under
References
for an example.
Copyright © 2009, Texas Instruments Incorporated
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