c
3
3
4
1
2
C
R
/ /R
=
´ p ´
´
f
(
) (
)
(
)
2
4
2
OUT
o
o
1
3
4
1
R
R
R
V
V
V
1
INA
1
VREF
R
R
R
R
æ
ö
æ
ö
æ
ö
=
+ -
- =
+
+ +
+
ç
÷
ç
÷
ç
÷
+
è
ø
è
ø
è
ø
+
±
V+
C1
V-
C2
R6
INA+
R5
Vo+
+
±
VREF
V-
V+
Vo-
R3
R4
C3
R1
R2
Schematic and PCB Layout
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16
SBOU193 – July 2017
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Copyright © 2017, Texas Instruments Incorporated
DUAL-DIYAMP-EVM
3.9
Single-Ended Input to Differential Output
Figure 23
displays the schematic for the single-ended input to differential output circuit configuration.
Figure 23. Single-Ended Input to Differential Output Schematic
The single-ended input to differential output circuit is used to convert a single-ended input to a differential
output.
Equation 17
displays the transfer function of the single-ended input to differential output circuit
configuration.
(17)
Capacitor C3 provides the option to filter noise introduced from the reference voltage (VREF).
Equation 18
calculates the cut-off frequency of the filter.
(18)
Figure 24
displays the PCB layout of the top layer of the single-ended input to differential output circuit
configuration.
Figure 24. Single-Ended Input to Differential Output Top Layer PCB Layout