Texas Instruments DUAL-DIYAMP-EVM, User Manual

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4/9 1/6
5/10 4/9 2/7
R R
OUTA / B 1 INA / B
R R R
æ öæ ö
= +
ç ÷ç ÷
+
è ø è ø
+
±
R4/9
OUTA/B
INA/B
V+
C2
C3
V-
R5/10
C4/8
R2/7
R1/6
C1/5
R3/8
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Schematic and PCB Layout
13 SBOU193 – July 2017
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DUAL-DIYAMP-EVM
For guidance in designing a filter, download the FilterPro™ active filter design software.
Figure 18 displays the PCB layout of the top layer of the multiple feedback active filter circuit configuration.
Figure 18. Sallen-Key Active Filter PCB Layout
3.7 Riso With Dual-Feedback
Figure 19 displays the schematic for the Riso with dual-feedback circuit configuration.
Figure 19. Riso With Dual-Feedback Schematic
Equation 14 calculates the dc gain of the Riso with dual-feedback circuit configuration.
(14)
This capacitive load (C4/8) compensation technique uses an isolation resistor (R3/8) to compensate the
circuit by adding a zero to cancel the pole from the output impedance and capacitive load. Refer to the
TI
Precision Labs - Op Amps: Stability 5 video for detailed information on this technique.