-
=
G
GS(th)
S
DS(Max)
V
V
R
I
Instantaneous Load Current [mA]
Max Out
p
ut
Vo
ltage [V
]
0
1
2
3
4
5
6
7
8
9
10
11
0
60
120
180
240
300
360
420
480
540
600
D001
www.ti.com
Output
6
Output
The DRV2700 has an output terminal header for connecting the piezo load.
6.1
Load Selection
The DRV2700 is intended to drive piezo (capacitive) loads. Therefore, there are several key specifications
to consider when choosing a piezo load; such as dimensions, blocking force, and displacement. However,
the key electrical specifications from the driver perspective are voltage rating and capacitance.
Figure 13
shows the typical instantaneous maximum load current versus output voltage.
Figure 13. Instantaneous Max Load Current vs Max Output Voltage
6.2
Pulldown Network
The pulldown FET and one or more resistors are used to remove the charge on the high-voltage output
faster than just simply using the feedback resistors. Because the FET must be driven from a comparator,
an NMOS FET must be used. During normal operation, the V
DS
of the NMOS is subject to any voltage
from approximately 0 V when the FET is on, to the output on the flyback configuration (V
HV
) when the FET
is off. Therefore, selecting a FET with a V
DS
breakdown higher than the maximum V
HV
is required.
Additionally, placing a resistor in series with this FET (on the source side) to limit the current going
through the FET is recommended. This resistor can be sized according to the maximum current allowed
per the data sheet of the FET, such that when current flows through the resistor, it raises the source
voltage and thereby lowers the V
GS
and shuts the FET off. Using
Equation 4
provides a good value of R
S
where V
G
is the V
OH
of the opamp, V
GS(th)
is the threshold voltage of the FET and I
DS(Max)
is the maximum
current allowed through the FET. As an additional measure, one or more resistors can be placed on the
drain and gate side to protect the pulldown FET by minimizing sharp transients that can be coupled to the
other terminals of the FET.
(4)
Because the output voltage will ripple (based on the load current and cap) the threshold at which the
opamp turns on the FET needs to be set effectively. To try and eliminate the need for external references,
two references from the basic circuit configuration are used. The R
EXT
voltage at
≈
1.3 V is regulated
internally by the DRV2700; however, it cannot source or sink very much current. Therefore, by connecting
this reference to a high impedance input to an opamp, which draws zero current, this reference can be
used.
17
SLOU407A – April 2015 – Revised May 2015
DRV2700EVM-HV500 High Voltage Piezo Driver Evaluation Kit
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